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Re: [PATCH] docs/system/riscv: remove core limit from virt machine


From: Daniel Henrique Barboza
Subject: Re: [PATCH] docs/system/riscv: remove core limit from virt machine
Date: Fri, 20 Oct 2023 17:04:31 -0300
User-agent: Mozilla Thunderbird

The commit title is misleading. We're not removing the core limit, we're
updating it.

I just sent a new version with an appropriate commit title. Thanks,


Daniel

On 10/19/23 10:48, Daniel Henrique Barboza wrote:
The 'virt' RISC-V machine does not have a 8 core limit. The current
limit is set in include/hw/riscv/virt.h, VIRT_CPUS_MAX, set to 512 at
this moment.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1945
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
  docs/system/riscv/virt.rst | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
index f9a2eac544..f5fa7b8b29 100644
--- a/docs/system/riscv/virt.rst
+++ b/docs/system/riscv/virt.rst
@@ -12,7 +12,7 @@ Supported devices
The ``virt`` machine supports the following devices: -* Up to 8 generic RV32GC/RV64GC cores, with optional extensions
+* Up to 512 generic RV32GC/RV64GC cores, with optional extensions
  * Core Local Interruptor (CLINT)
  * Platform-Level Interrupt Controller (PLIC)
  * CFI parallel NOR flash memory



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