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Re: [PATCH v4 5/9] target/riscv/tcg: add riscv_cpu_write_misa_bit()
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From: |
Andrew Jones |
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Subject: |
Re: [PATCH v4 5/9] target/riscv/tcg: add riscv_cpu_write_misa_bit() |
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Date: |
Wed, 25 Oct 2023 18:14:49 +0200 |
On Wed, Oct 25, 2023 at 10:49:57AM -0300, Daniel Henrique Barboza wrote:
> We have two instances of the setting/clearing a MISA bit from
> env->misa_ext and env->misa_ext_mask pattern. And the next patch will
> end up adding one more.
>
> Create a helper to avoid code repetition.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
> ---
> target/riscv/tcg/tcg-cpu.c | 44 ++++++++++++++++++++------------------
> 1 file changed, 23 insertions(+), 21 deletions(-)
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
- Re: [PATCH v4 3/9] target/riscv/tcg: add user flag for profile support, (continued)
- [PATCH v4 2/9] target/riscv/kvm: add 'rva22u64' flag as unavailable, Daniel Henrique Barboza, 2023/10/25
- [PATCH v4 4/9] target/riscv/tcg: add MISA user options hash, Daniel Henrique Barboza, 2023/10/25
- [PATCH v4 8/9] target/riscv/tcg: honor user choice for G MISA bits, Daniel Henrique Barboza, 2023/10/25
- [PATCH v4 9/9] target/riscv/tcg: warn if profile exts are disabled, Daniel Henrique Barboza, 2023/10/25
- [PATCH v4 5/9] target/riscv/tcg: add riscv_cpu_write_misa_bit(), Daniel Henrique Barboza, 2023/10/25
- Re: [PATCH v4 5/9] target/riscv/tcg: add riscv_cpu_write_misa_bit(),
Andrew Jones <=
- [PATCH v4 7/9] target/riscv/tcg: add hash table insert helpers, Daniel Henrique Barboza, 2023/10/25
- [PATCH v4 6/9] target/riscv/tcg: handle profile MISA bits, Daniel Henrique Barboza, 2023/10/25