Re: [PATCH v2 4/6] target/riscv: Add pointer masking tb flags

[Alexey Baturo]

>Any particular reason to add these in the middle?

No actual reason except for previously those flags were there in the middle. I'll move them to the end of the list, that sounds reasonable.

>Something to consider as a somewhat unrelated cleanup would be to add an...

That's a good idea and I agree we could do it as part of future clean up.

Thanks, Richard

пт, 29 дек. 2023 г. в 02:33, Richard Henderson <richard.henderson@linaro.org>:

On 12/24/23 15:48, Alexey Baturo wrote:
> From: Alexey Baturo <baturo.alexey@gmail.com>
>
> Signed-off-by: Alexey Baturo <baturo.alexey@gmail.com>
> ---
>   target/riscv/cpu.h        | 15 +++++++++------
>   target/riscv/cpu_helper.c |  3 +++
>   target/riscv/translate.c  |  5 +++++
>   3 files changed, 17 insertions(+), 6 deletions(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index c607a94bba..038b86db4b 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -538,14 +538,17 @@ FIELD(TB_FLAGS, VILL, 14, 1)
>   FIELD(TB_FLAGS, VSTART_EQ_ZERO, 15, 1)
>   /* The combination of MXL/SXL/UXL that applies to the current cpu mode. */
>   FIELD(TB_FLAGS, XL, 16, 2)
> -FIELD(TB_FLAGS, VTA, 18, 1)
> -FIELD(TB_FLAGS, VMA, 19, 1)
> +/* If pointer masking should be applied and address sign extended */
> +FIELD(TB_FLAGS, PM_PMM, 18, 2)
> +FIELD(TB_FLAGS, PM_SIGNEXTEND, 20, 1)
> +FIELD(TB_FLAGS, VTA, 21, 1)
> +FIELD(TB_FLAGS, VMA, 22, 1)
>   /* Native debug itrigger */
> -FIELD(TB_FLAGS, ITRIGGER, 20, 1)
> +FIELD(TB_FLAGS, ITRIGGER, 23, 1)
>   /* Virtual mode enabled */
> -FIELD(TB_FLAGS, VIRT_ENABLED, 21, 1)
> -FIELD(TB_FLAGS, PRIV, 22, 2)
> -FIELD(TB_FLAGS, AXL, 24, 2)
> +FIELD(TB_FLAGS, VIRT_ENABLED, 24, 1)
> +FIELD(TB_FLAGS, PRIV, 25, 2)
> +FIELD(TB_FLAGS, AXL, 27, 2)

Any particular reason to add these in the middle?

Something to consider as a somewhat unrelated cleanup would be to add an eighth MMUIdx for
MMUIdx_M + no translation.  This would be used both for MBARE and internally within
get_physical_address for accessing PTEs.  See also the ptw_translate cleanups in
target/i386 for atomic PTE updates (4a1e9d4d11cd).

At which point PM_SIGNEXTEND can be replaced by a test vs mmu_idx, saving a bit in tb_flags.

Something for later, anyway.


r~