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[PATCH v3 1/3] target/riscv: Add Zaamo and Zalrsc extension infrastructu
From: |
Rob Bradford |
Subject: |
[PATCH v3 1/3] target/riscv: Add Zaamo and Zalrsc extension infrastructure |
Date: |
Tue, 23 Jan 2024 11:10:28 +0000 |
These extensions represent the atomic operations from A (Zaamo) and the
Load-Reserved/Store-Conditional operations from A (Zalrsc)
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/cpu_cfg.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index fea14c275f..cc4c30244c 100644
--- a/target/riscv/cpu_cfg.h
+++ b/target/riscv/cpu_cfg.h
@@ -78,7 +78,9 @@ struct RISCVCPUConfig {
bool ext_svnapot;
bool ext_svpbmt;
bool ext_zdinx;
+ bool ext_zaamo;
bool ext_zacas;
+ bool ext_zalrsc;
bool ext_zawrs;
bool ext_zfa;
bool ext_zfbfmin;
--
2.43.0