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Re: [PATCH v3 2/5] target/riscv: remove 'over' brconds from vector trans


From: Richard Henderson
Subject: Re: [PATCH v3 2/5] target/riscv: remove 'over' brconds from vector trans
Date: Tue, 20 Feb 2024 10:19:20 -1000
User-agent: Mozilla Thunderbird

On 2/20/24 09:26, Daniel Henrique Barboza wrote:
Most of the vector translations has this following pattern at the start:

     TCGLabel *over = gen_new_label();
     tcg_gen_brcond_tl(TCG_COND_GEU, cpu_vstart, cpu_vl, over);

And then right at the end:

      gen_set_label(over);
      return true;

This means that if vstart >= vl we'll not set vstart = 0 at the end of
the insns - this is done inside the helper that is being skipped.  The
reason why this pattern hasn't been a bigger problem is because the
conditional vstart >= vl is very rare.

Checking all the helpers in vector_helper.c we see all of them with a
pattern like this:

     for (i = env->vstart; i < vl; i++) {
         (...)
     }
     env->vstart = 0;

Thus they can handle vstart >= vl case gracefully, with the benefit of
setting env->vstart = 0 during the process.

Remove all 'over' conditionals and let the helper set env->vstart = 0
every time.

Suggested-by: Richard Henderson<richard.henderson@linaro.org>
Signed-off-by: Daniel Henrique Barboza<dbarboza@ventanamicro.com>
---
  target/riscv/insn_trans/trans_rvv.c.inc  | 116 -----------------------
  target/riscv/insn_trans/trans_rvvk.c.inc |  18 ----
  2 files changed, 134 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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