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[Stable-8.2.3 52/87] target/loongarch: Fix qemu-system-loongarch64 asser
From: |
Michael Tokarev |
Subject: |
[Stable-8.2.3 52/87] target/loongarch: Fix qemu-system-loongarch64 assert failed with the option '-d int' |
Date: |
Wed, 10 Apr 2024 10:22:25 +0300 |
From: Song Gao <gaosong@loongson.cn>
qemu-system-loongarch64 assert failed with the option '-d int',
the helper_idle() raise an exception EXCP_HLT, but the exception name is
undefined.
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240321123606.1704900-1-gaosong@loongson.cn>
(cherry picked from commit 1590154ee4376819a8c6ee61e849ebf4a4e7cd02)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index fc075952e6..570201e616 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -35,33 +35,45 @@ const char * const fregnames[32] = {
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
};
-static const char * const excp_names[] = {
- [EXCCODE_INT] = "Interrupt",
- [EXCCODE_PIL] = "Page invalid exception for load",
- [EXCCODE_PIS] = "Page invalid exception for store",
- [EXCCODE_PIF] = "Page invalid exception for fetch",
- [EXCCODE_PME] = "Page modified exception",
- [EXCCODE_PNR] = "Page Not Readable exception",
- [EXCCODE_PNX] = "Page Not Executable exception",
- [EXCCODE_PPI] = "Page Privilege error",
- [EXCCODE_ADEF] = "Address error for instruction fetch",
- [EXCCODE_ADEM] = "Address error for Memory access",
- [EXCCODE_SYS] = "Syscall",
- [EXCCODE_BRK] = "Break",
- [EXCCODE_INE] = "Instruction Non-Existent",
- [EXCCODE_IPE] = "Instruction privilege error",
- [EXCCODE_FPD] = "Floating Point Disabled",
- [EXCCODE_FPE] = "Floating Point Exception",
- [EXCCODE_DBP] = "Debug breakpoint",
- [EXCCODE_BCE] = "Bound Check Exception",
- [EXCCODE_SXD] = "128 bit vector instructions Disable exception",
- [EXCCODE_ASXD] = "256 bit vector instructions Disable exception",
+struct TypeExcp {
+ int32_t exccode;
+ const char * const name;
+};
+
+static const struct TypeExcp excp_names[] = {
+ {EXCCODE_INT, "Interrupt"},
+ {EXCCODE_PIL, "Page invalid exception for load"},
+ {EXCCODE_PIS, "Page invalid exception for store"},
+ {EXCCODE_PIF, "Page invalid exception for fetch"},
+ {EXCCODE_PME, "Page modified exception"},
+ {EXCCODE_PNR, "Page Not Readable exception"},
+ {EXCCODE_PNX, "Page Not Executable exception"},
+ {EXCCODE_PPI, "Page Privilege error"},
+ {EXCCODE_ADEF, "Address error for instruction fetch"},
+ {EXCCODE_ADEM, "Address error for Memory access"},
+ {EXCCODE_SYS, "Syscall"},
+ {EXCCODE_BRK, "Break"},
+ {EXCCODE_INE, "Instruction Non-Existent"},
+ {EXCCODE_IPE, "Instruction privilege error"},
+ {EXCCODE_FPD, "Floating Point Disabled"},
+ {EXCCODE_FPE, "Floating Point Exception"},
+ {EXCCODE_DBP, "Debug breakpoint"},
+ {EXCCODE_BCE, "Bound Check Exception"},
+ {EXCCODE_SXD, "128 bit vector instructions Disable exception"},
+ {EXCCODE_ASXD, "256 bit vector instructions Disable exception"},
+ {EXCP_HLT, "EXCP_HLT"},
};
const char *loongarch_exception_name(int32_t exception)
{
- assert(excp_names[exception]);
- return excp_names[exception];
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(excp_names); i++) {
+ if (excp_names[i].exccode == exception) {
+ return excp_names[i].name;
+ }
+ }
+ return "Unknown";
}
void G_NORETURN do_raise_exception(CPULoongArchState *env,
@@ -70,7 +82,7 @@ void G_NORETURN do_raise_exception(CPULoongArchState *env,
{
CPUState *cs = env_cpu(env);
- qemu_log_mask(CPU_LOG_INT, "%s: %d (%s)\n",
+ qemu_log_mask(CPU_LOG_INT, "%s: expection: %d (%s)\n",
__func__,
exception,
loongarch_exception_name(exception));
@@ -145,22 +157,16 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
CPULoongArchState *env = &cpu->env;
bool update_badinstr = 1;
int cause = -1;
- const char *name;
bool tlbfill = FIELD_EX64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR);
uint32_t vec_size = FIELD_EX64(env->CSR_ECFG, CSR_ECFG, VS);
if (cs->exception_index != EXCCODE_INT) {
- if (cs->exception_index < 0 ||
- cs->exception_index >= ARRAY_SIZE(excp_names)) {
- name = "unknown";
- } else {
- name = excp_names[cs->exception_index];
- }
-
qemu_log_mask(CPU_LOG_INT,
"%s enter: pc " TARGET_FMT_lx " ERA " TARGET_FMT_lx
- " TLBRERA " TARGET_FMT_lx " %s exception\n", __func__,
- env->pc, env->CSR_ERA, env->CSR_TLBRERA, name);
+ " TLBRERA " TARGET_FMT_lx " exception: %d (%s)\n",
+ __func__, env->pc, env->CSR_ERA, env->CSR_TLBRERA,
+ cs->exception_index,
+ loongarch_exception_name(cs->exception_index));
}
switch (cs->exception_index) {
--
2.39.2
- [Stable-8.2.3 40/87] target/i386: Revert monitor_puts() in do_inject_x86_mce(), (continued)
- [Stable-8.2.3 40/87] target/i386: Revert monitor_puts() in do_inject_x86_mce(), Michael Tokarev, 2024/04/10
- [Stable-8.2.3 44/87] target/hppa: ldcw,s uses static shift of 3, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 46/87] target/hppa: fix access_id check, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 45/87] target/hppa: fix shrp for wide mode, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 47/87] target/hppa: exit tb on flush cache instructions, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 43/87] target/hppa: Fix assemble_12a insns for wide mode, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 48/87] target/hppa: mask privilege bits in mfia, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 50/87] target/loongarch: Fix qemu-loongarch64 hang when executing 'll.d $t0, $t0, 0', Michael Tokarev, 2024/04/10
- [Stable-8.2.3 49/87] target/hppa: fix do_stdby_e(), Michael Tokarev, 2024/04/10
- [Stable-8.2.3 51/87] docs/conf.py: Remove usage of distutils, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 52/87] target/loongarch: Fix qemu-system-loongarch64 assert failed with the option '-d int',
Michael Tokarev <=
- [Stable-8.2.3 54/87] vdpa-dev: Fix initialisation order to restore VDUSE compatibility, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 53/87] target/s390x: Use mutable temporary value for op_ts, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 56/87] block-backend: fix edge case in bdrv_next() where BDS associated to BB changes, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 55/87] block/io: accept NULL qiov in bdrv_pad_request, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 57/87] block-backend: fix edge case in bdrv_next_cleanup() where BDS associated to BB changes, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 59/87] target/i386/tcg: Enable page walking from MMIO memory, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 61/87] monitor/hmp-cmds-target: Append a space in error message in gpa2hva(), Michael Tokarev, 2024/04/10
- [Stable-8.2.3 58/87] iotests: add test for stream job with an unaligned prefetch read, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 60/87] hw/scsi/scsi-generic: Fix io_timeout property not applying, Michael Tokarev, 2024/04/10
- [Stable-8.2.3 63/87] trans_rvv.c.inc: set vstart = 0 in int scalar move insns, Michael Tokarev, 2024/04/10