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Re: [PATCH] target/arm: Restrict translation disabled alignment check to
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH] target/arm: Restrict translation disabled alignment check to VMSA |
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Date: |
Thu, 25 Apr 2024 20:18:47 +0100 |
On Mon, 22 Apr 2024 at 18:07, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> For cpus using PMSA, when the MPU is disabled, the default memory
> type is Normal, Non-cachable.
>
> Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when
> translation disabled")
> Reported-by: Clément Chigot <chigot@adacore.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>
> Since v9 will likely be tagged tomorrow without this fixed,
> Cc: qemu-stable@nongnu.org
Applied to target-arm.next (with the cc:stable added in and a couple of
trivial tweaks to the comment/commit message), thanks.
-- PMM