Re: [PATCH v2 1/1] target/riscv/kvm: fix timebase-frequency when using KVM acceleration

[Andrew Jones]

On April 27, 2024 1:44:42 AM GMT+02:00, Michael Tokarev <mjt@tls.msk.ru> wrote:
>14.03.2024 09:15, Yong-Xuan Wang:
>> The timebase-frequency of guest OS should be the same with host
>> machine. The timebase-frequency value in DTS should be got from
>> hypervisor when using KVM acceleration.
>
>This change ended up in stable-8.2 (v8.2.3).  Interestingly, this thing
>compiled not even once, or else it would be obvious it fails to compile.
>Somehow I was too used to CI, forgetting that we don't have riscv *host*
>in CI (and I don't have one locally either).  So 8.2.3 is broken on
>riscv64 *host*.

It's possible to cross-compile qemu, so it'd be good to add that to the CI for 
riscv until we can add native compiling.

>
>In 8.2, KVM_RISCV_GET_TIMER macro accepts 4 arguments, because it does
>not have 10f86d1b845087d1 "target/riscv/kvm: change timer regs size to u64".
>
>What do you think, should I revert this change for stable-8.2, or pick
>10f86d1b845087d1 too, or change this commit (fix timebase-frequency) to
>provide the missing argument for this macro?

Changing the timer regs to u64 is an rv32 fix, so it's reasonable to also pick 
it up. I suggest we keep this patch one way or another, though.

Thanks,
drew

>
>Thanks,
>
>/mjt
>
>
>> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
>> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
>> 
>> ---
>> Changelog
>> v2:
>> - update the function definition
>> - restructure if-else statement
>> ---
>>   hw/riscv/virt.c              | 2 ++
>>   target/riscv/kvm/kvm-cpu.c   | 9 +++++++++
>>   target/riscv/kvm/kvm_riscv.h | 1 +
>>   3 files changed, 12 insertions(+)
>> 
>> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
>> index a094af97c32a..533b17799581 100644
>> --- a/hw/riscv/virt.c
>> +++ b/hw/riscv/virt.c
>> @@ -711,6 +711,8 @@ static void create_fdt_sockets(RISCVVirtState *s, const 
>> MemMapEntry *memmap,
>>         qemu_fdt_add_subnode(ms->fdt, "/cpus");
>>       qemu_fdt_setprop_cell(ms->fdt, "/cpus", "timebase-frequency",
>> +                          kvm_enabled() ?
>> +                          kvm_riscv_get_timebase_frequency(first_cpu) :
>>                             RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ);
>>       qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0);
>>       qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1);
>> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
>> index c7afdb1e81b7..bbb115eaa867 100644
>> --- a/target/riscv/kvm/kvm-cpu.c
>> +++ b/target/riscv/kvm/kvm-cpu.c
>> @@ -739,6 +739,15 @@ static void kvm_riscv_put_regs_timer(CPUState *cs)
>>       env->kvm_timer_dirty = false;
>>   }
>>   +uint64_t kvm_riscv_get_timebase_frequency(CPUState *cs)
>> +{
>> +    uint64_t reg;
>> +
>> +    KVM_RISCV_GET_TIMER(cs, frequency, reg);
>> +
>> +    return reg;
>> +}
>> +
>>   static int kvm_riscv_get_regs_vector(CPUState *cs)
>>   {
>>       RISCVCPU *cpu = RISCV_CPU(cs);
>> diff --git a/target/riscv/kvm/kvm_riscv.h b/target/riscv/kvm/kvm_riscv.h
>> index 4bd98fddc776..58518988681d 100644
>> --- a/target/riscv/kvm/kvm_riscv.h
>> +++ b/target/riscv/kvm/kvm_riscv.h
>> @@ -28,5 +28,6 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t 
>> group_shift,
>>   void riscv_kvm_aplic_request(void *opaque, int irq, int level);
>>   int kvm_riscv_sync_mpstate_to_kvm(RISCVCPU *cpu, int state);
>>   void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp);
>> +uint64_t kvm_riscv_get_timebase_frequency(CPUState *cs);
>>     #endif
>