Re: [avr-gcc-list] compiler function prologue/epilogue incorrect?

[Paulo Marques]

address@hidden wrote:
> Hi

Hi,

> [...] What doesn't seem to make
> sense for me is that SREG is being restored (and perhaps interrupts
> enabled) before SPL is updated. The assembler tutorial I have
> suggests that SEI will execute at least one more instruction
> before reacting to an interrupt but it's not obvious that
> out 0x3f, r0 will do the same thing or if an interrupt could occur
> before SPL is updated. 

The "one more instruction" thing probably has to do with the two level 
pipeline of this CPU, so it should work for any instruction that updates 
the interrupt flag, and not just "SEI". At least this has been done like 
this for a long time and we have never seen any reports of it misbehaving.

> I think it would be safer if the compiler
> swapped the last two lines? The same issue occurs in the function
> epilogue.

It is only "safer" if there is any chance of it calling the interrupt 
right after restoring the flags register. On the down side it would 
increase the interrupt latency and that can be bad for some classes of 
applications.

--
Paulo Marques - www.grupopie.com

"The face of a child can say it all, especially the
mouth part of the face."