RE: [avr-libc-dev] Bug #28901 - GPIO_t and CPU_t definitions

[Boyapati, Anitha]

Hi Joerg,

>-----Original Message-----
>From: Joerg Wunsch [mailto:address@hidden
>Sent: Tuesday, March 23, 2010 2:24 AM
>To: address@hidden
>Cc: Boyapati, Anitha
>Subject: Re: [avr-libc-dev] Bug #28901 - GPIO_t and CPU_t definitions
>
>Hi Anitha,
>
>> 1. What purpose do GPIO and CPU definitions serve?
>
>As far as I understand (disclaimer: I didn't do much with Xmegas so
>far), they are just IO register blocks as any other IO register block
>in the Xmega.  If you look into the Xmega A datasheet, chapter 3 (AVR
>CPU), there is a section "Register Summary" at the end of that
>chapter, describing the IO registers that belong to the CPU block
>(SREG, stack pointer etc.).
>

>Likewise, the GPIO register block is described in section 4.18. 


Yes. This is a lot useful. 


> GPIO
>registers are not tied to any hardware pin, their sole purpose is that
>they are available to the CPU with faster instructions (IN, OUT, CBI,
>SBI) than generic memory access (LD, ST) so they could be (ab)used as
>fast "bit memory".  (I'm not sure whether you could possibly include
>them into the Xmega event system.)


I'll look into this further


Thanks
Anitha