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[Commit-gnuradio] r5188 - in gnuradio/branches/developers/matt/u2f: firm
From: |
matt |
Subject: |
[Commit-gnuradio] r5188 - in gnuradio/branches/developers/matt/u2f: firmware opencores/aemb/rtl/verilog opencores/aemb/rtl/verilog/CVS opencores/aemb/sim/verilog opencores/aemb/sim/verilog/CVS opencores/aemb/sw/c opencores/aemb/sw/c/CVS opencores/simple_gpio/rtl top/u2_basic top/u2_fpga top/u2_sim |
Date: |
Sat, 28 Apr 2007 15:53:47 -0600 (MDT) |
Author: matt
Date: 2007-04-28 15:53:47 -0600 (Sat, 28 Apr 2007)
New Revision: 5188
Modified:
gnuradio/branches/developers/matt/u2f/firmware/bootstrap.c
gnuradio/branches/developers/matt/u2f/firmware/memory_map.h
gnuradio/branches/developers/matt/u2f/firmware/spi.c
gnuradio/branches/developers/matt/u2f/opencores/aemb/rtl/verilog/CVS/Entries
gnuradio/branches/developers/matt/u2f/opencores/aemb/rtl/verilog/aeMB_regfile.v
gnuradio/branches/developers/matt/u2f/opencores/aemb/sim/verilog/CVS/Entries
gnuradio/branches/developers/matt/u2f/opencores/aemb/sim/verilog/testbench.v
gnuradio/branches/developers/matt/u2f/opencores/aemb/sw/c/CVS/Entries
gnuradio/branches/developers/matt/u2f/opencores/aemb/sw/c/aeMB_testbench.c
gnuradio/branches/developers/matt/u2f/opencores/simple_gpio/rtl/simple_gpio.v
gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v
gnuradio/branches/developers/matt/u2f/top/u2_fpga/u2_fpga.ise
gnuradio/branches/developers/matt/u2f/top/u2_sim/build_flash
Log:
code actually runs on real physical FPGA, blinks leds, control SPI ports!
Modified: gnuradio/branches/developers/matt/u2f/firmware/bootstrap.c
===================================================================
--- gnuradio/branches/developers/matt/u2f/firmware/bootstrap.c 2007-04-28
20:39:47 UTC (rev 5187)
+++ gnuradio/branches/developers/matt/u2f/firmware/bootstrap.c 2007-04-28
21:53:47 UTC (rev 5188)
@@ -10,9 +10,26 @@
spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00003D80, 24); // Turn on output
1, normal levels
spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004B80, 24); // Bypass divider
spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005A01, 24); // Update Regs
-
+
+ spi_wait();
+
// Allow for clock switchover
char clock_controls = (char)0x1C;
- char *p = (char *) OUTPUTS_BASE + OUTPUTS_CLK;
+ volatile char *p = (char *) OUTPUTS_BASE + OUTPUTS_CLK;
*p = clock_controls;
+
+ // Control LEDs
+
+ volatile char *leds = (char *) OUTPUTS_BASE + OUTPUTS_MISC;
+ while(1) {
+ *leds = (char) 0x00;
+ *leds = (char) 0x01;
+ *leds = (char) 0x00;
+ *leds = (char) 0x01;
+ *leds = (char) 0x01;
+ *leds = (char) 0x01;
+ *leds = (char) 0x03;
+ *leds = (char) 0x02;
+ }
+
}
Modified: gnuradio/branches/developers/matt/u2f/firmware/memory_map.h
===================================================================
--- gnuradio/branches/developers/matt/u2f/firmware/memory_map.h 2007-04-28
20:39:47 UTC (rev 5187)
+++ gnuradio/branches/developers/matt/u2f/firmware/memory_map.h 2007-04-28
21:53:47 UTC (rev 5188)
@@ -4,10 +4,12 @@
**********************************************************
*/
+/////////////////////////////////////////////////////
+// Main RAM
#define RAM_BASE 0x0000
/////////////////////////////////////////////////////
-// SPI Wishbone Core. See core docs for more info
+// SPI Core. See core docs for more info
#define SPI_BASE 0x1000 // Base address (16-bit)
// Register address offsets
@@ -34,13 +36,21 @@
#define SPI_TXONLY 0
#define SPI_TXRX 1
+
////////////////////////////////////////////////
// I2C
#define I2C_BASE 0x2000
+
+
+////////////////////////////////////////////////
+// GPIO
#define GPIO_BASE 0x3000
+#define GPIO_DDR 0
+#define GPIO_REG 1
///////////////////////////////////////////////////
+// Basic Outputs
#define OUTPUTS_BASE 0x4000
#define OUTPUTS_CLK 0
Modified: gnuradio/branches/developers/matt/u2f/firmware/spi.c
===================================================================
--- gnuradio/branches/developers/matt/u2f/firmware/spi.c 2007-04-28
20:39:47 UTC (rev 5187)
+++ gnuradio/branches/developers/matt/u2f/firmware/spi.c 2007-04-28
21:53:47 UTC (rev 5188)
@@ -2,8 +2,7 @@
void
spi_init() {
- int *p;
- int val;
+ volatile int *p;
// Set divider
p = (int *)(SPI_BASE+SPI_DIV);
@@ -12,7 +11,7 @@
void
spi_wait() {
- int *p;
+ volatile int *p;
p = (int *)(SPI_BASE+SPI_CTRL);
while(*p & SPI_CTRL_GO_BSY)
{}
@@ -20,7 +19,7 @@
int
spi_transact(int readback, int slave, int data, int length) {
- int *p;
+ volatile int *p;
spi_wait();
// Tell it which SPI device to access
Modified:
gnuradio/branches/developers/matt/u2f/opencores/aemb/rtl/verilog/CVS/Entries
===================================================================
---
gnuradio/branches/developers/matt/u2f/opencores/aemb/rtl/verilog/CVS/Entries
2007-04-28 20:39:47 UTC (rev 5187)
+++
gnuradio/branches/developers/matt/u2f/opencores/aemb/rtl/verilog/CVS/Entries
2007-04-28 21:53:47 UTC (rev 5188)
@@ -5,5 +5,5 @@
/aeMB_core.v/1.5/Fri Apr 27 01:14:55 2007//
/aeMB_fetch.v/1.4/Fri Apr 27 01:14:55 2007//
/aeMB_decode.v/1.7/Fri Apr 27 02:01:26 2007//
-/aeMB_regfile.v/1.13/Fri Apr 27 02:01:26 2007//
+/aeMB_regfile.v/1.14/Sat Apr 28 20:01:41 2007//
D
Modified:
gnuradio/branches/developers/matt/u2f/opencores/aemb/rtl/verilog/aeMB_regfile.v
===================================================================
---
gnuradio/branches/developers/matt/u2f/opencores/aemb/rtl/verilog/aeMB_regfile.v
2007-04-28 20:39:47 UTC (rev 5187)
+++
gnuradio/branches/developers/matt/u2f/opencores/aemb/rtl/verilog/aeMB_regfile.v
2007-04-28 21:53:47 UTC (rev 5188)
@@ -1,5 +1,5 @@
/*
- * $Id: aeMB_regfile.v,v 1.13 2007/04/27 04:22:40 sybreon Exp $
+ * $Id: aeMB_regfile.v,v 1.14 2007/04/27 15:15:49 sybreon Exp $
*
* AEMB Register File
* Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <address@hidden>
@@ -27,6 +27,9 @@
*
* HISTORY
* $Log: aeMB_regfile.v,v $
+ * Revision 1.14 2007/04/27 15:15:49 sybreon
+ * Fixed simulation bug.
+ *
* Revision 1.13 2007/04/27 04:22:40 sybreon
* Fixed minor synthesis bug.
*
@@ -230,7 +233,7 @@
// synopsys translate_off
integer i;
initial begin
- for (i=0;i<31;i=i+1) begin
+ for (i=0;i<32;i=i+1) begin
rMEMA[i] <= $random;
rMEMB[i] <= $random;
rMEMD[i] <= $random;
Modified:
gnuradio/branches/developers/matt/u2f/opencores/aemb/sim/verilog/CVS/Entries
===================================================================
---
gnuradio/branches/developers/matt/u2f/opencores/aemb/sim/verilog/CVS/Entries
2007-04-28 20:39:47 UTC (rev 5187)
+++
gnuradio/branches/developers/matt/u2f/opencores/aemb/sim/verilog/CVS/Entries
2007-04-28 21:53:47 UTC (rev 5188)
@@ -1,3 +1,3 @@
/utestbench.v/1.1/Fri Apr 13 13:02:34 2007//
-/testbench.v/1.2/Wed Apr 25 19:45:17 2007//
+/testbench.v/1.3/Sat Apr 28 20:01:41 2007//
D
Modified:
gnuradio/branches/developers/matt/u2f/opencores/aemb/sim/verilog/testbench.v
===================================================================
---
gnuradio/branches/developers/matt/u2f/opencores/aemb/sim/verilog/testbench.v
2007-04-28 20:39:47 UTC (rev 5187)
+++
gnuradio/branches/developers/matt/u2f/opencores/aemb/sim/verilog/testbench.v
2007-04-28 21:53:47 UTC (rev 5188)
@@ -1,28 +1,32 @@
/*
- * $Id: testbench.v,v 1.2 2007/04/25 22:15:05 sybreon Exp $
+ * $Id: testbench.v,v 1.3 2007/04/27 15:18:43 sybreon Exp $
*
* AEMB Generic Testbench
- * Copyright (C) 2006 Shawn Tan Ser Ngiap <address@hidden>
+ * Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <address@hidden>
*
- * This library is free software; you can redistribute it and/or modify it
- * under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation; either version 2.1 of the License,
- * or (at your option) any later version.
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public License
+ * as published by the Free Software Foundation; either version 2.1 of
+ * the License, or (at your option) any later version.
*
- * This library is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
- * License for more details.
+ * This library is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
*
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library; if not, write to the Free Software Foundation,
Inc.,
- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
*
* DESCRIPTION
* Top level test bench and fake RAM/ROM.
*
* HISTORY
* $Log: testbench.v,v $
+ * Revision 1.3 2007/04/27 15:18:43 sybreon
+ * Minor updates as sw/c/aeMB_testbench.c got updated.
+ *
* Revision 1.2 2007/04/25 22:15:05 sybreon
* Added support for 8-bit and 16-bit data types.
*
@@ -126,10 +130,10 @@
if (dut.regfile.wDWE)
$writeh("\tR",dut.regfile.rRD_,"=",dut.regfile.wDDAT,";");
- if ((dwb_adr_o == 16'h8888) && (dwb_dat_o == 32'h7a55ed00))
- $display("*** SERVICE ***");
+ if (dwb_we_o & (dwb_dat_o == "INTR"))
+ $display("\t*** SERVICE ***");
if (dut.control.rFSM == 2'o1)
- $display("*** INTERRUPT ***");
+ $display("\t*** INTERRUPT ***");
if (dwb_we_o & (dwb_dat_o == "FAIL")) begin
$display("\tFAIL");
Modified: gnuradio/branches/developers/matt/u2f/opencores/aemb/sw/c/CVS/Entries
===================================================================
--- gnuradio/branches/developers/matt/u2f/opencores/aemb/sw/c/CVS/Entries
2007-04-28 20:39:47 UTC (rev 5187)
+++ gnuradio/branches/developers/matt/u2f/opencores/aemb/sw/c/CVS/Entries
2007-04-28 21:53:47 UTC (rev 5188)
@@ -1,2 +1,2 @@
-/aeMB_testbench.c/1.4/Wed Apr 25 19:45:17 2007//
+/aeMB_testbench.c/1.5/Sat Apr 28 20:01:41 2007//
D
Modified:
gnuradio/branches/developers/matt/u2f/opencores/aemb/sw/c/aeMB_testbench.c
===================================================================
--- gnuradio/branches/developers/matt/u2f/opencores/aemb/sw/c/aeMB_testbench.c
2007-04-28 20:39:47 UTC (rev 5187)
+++ gnuradio/branches/developers/matt/u2f/opencores/aemb/sw/c/aeMB_testbench.c
2007-04-28 21:53:47 UTC (rev 5188)
@@ -1,33 +1,34 @@
/*
- * $Id: aeMB_testbench.c,v 1.4 2007/04/25 22:15:05 sybreon Exp $
+ * $Id: aeMB_testbench.c,v 1.5 2007/04/27 15:17:59 sybreon Exp $
*
* AEMB Function Verification C Testbench
- * Copyright (C) 2006 Shawn Tan Ser Ngiap <address@hidden>
+ * Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <address@hidden>
*
- * This library is free software; you can redistribute it and/or modify it
- * under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation; either version 2.1 of the License,
- * or (at your option) any later version.
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public License
+ * as published by the Free Software Foundation; either version 2.1 of
+ * the License, or (at your option) any later version.
*
- * This library is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
- * License for more details.
+ * This library is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
*
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library; if not, write to the Free Software Foundation,
Inc.,
- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
*
- * DESCRIPTION
- * Runs a simple test programme that calculates fibonnaci numbers using two
- * different methods. It tests a whole gamut of operations and is tightly
- * linked to the ae68_testbench.v testbench module for verification.
- *
- * The fibonnaci code is from
- * http://en.literateprograms.org/Fibonacci_numbers_(C)
+ * DESCRIPTION
+ * It tests a whole gamut of operations and is tightly linked to the
+ * ae68_testbench.v testbench module for verification.
*
* HISTORY
* $Log: aeMB_testbench.c,v $
+ * Revision 1.5 2007/04/27 15:17:59 sybreon
+ * Added code documentation.
+ * Added new tests that test floating point, modulo arithmetic and
multiplication/division.
+ *
* Revision 1.4 2007/04/25 22:15:05 sybreon
* Added support for 8-bit and 16-bit data types.
*
@@ -42,31 +43,40 @@
*
*/
-/* Special Prototypes */
+/**
+ INTERRUPT TEST
+
+ This tests for the following:
+ - Pointer addressing
+ - Interrupt handling
+ */
void int_call_func (); // __attribute__((save_volatiles));
void int_handler_func () __attribute__ ((interrupt_handler));
-/* Interrupt Handler */
void int_handler_func () {
int_call_func();
}
void int_call_func () {
- int *p;
- p = 0x88888888;
- *p = 0x52544E49; // "INTR"
+ int* pio = (int*)0xFFFFFFFF;
+ *pio = 0x52544E49; // "INTR"
}
-/* Recursive Version */
+/**
+ FIBONACCI TEST
+ http://en.literateprograms.org/Fibonacci_numbers_(C)
-unsigned int slowfib(unsigned int n)
+ This tests for the following:
+ - Recursion & Iteration
+ - 32/16/8-bit data handling
+*/
+
+unsigned int fib_slow(unsigned int n)
{
- return n < 2 ? n : slowfib(n-1) + slowfib(n-2);
+ return n < 2 ? n : fib_slow(n-1) + fib_slow(n-2);
}
-/* Iterative Version */
-
-unsigned int fastfib(unsigned int n)
+unsigned int fib_fast(unsigned int n)
{
unsigned int a[3];
unsigned int *p=a;
@@ -85,70 +95,176 @@
return p==a?*(p+2):*(p-1);
}
-/* Various Test */
-
-int main() {
+int fib_test(int max) {
unsigned int n;
- unsigned int fib_fast, fib_slow;
- unsigned int fib_lut32[] = {0,
- 1,
- 1,
- 2,
- 3,
- 5,
- 8,
- 13,
- 21,
- 34,
- 55,
- 89,
- 144,
- 233};
-
- unsigned short fib_lut16[] = {0,
- 1,
- 1,
- 2,
- 3,
- 5,
- 8,
- 13,
- 21,
- 34,
- 55,
- 89,
- 144,
- 233};
+ unsigned int fast, slow;
+ // 32-bit LUT
+ unsigned int fib_lut32[] = {
+ 0, 1, 1, 2, 3, 5, 8, 13, 21, 34, 55, 89, 144, 233
+ };
+ // 16-bit LUT
+ unsigned short fib_lut16[] = {
+ 0, 1, 1, 2, 3, 5, 8, 13, 21, 34, 55, 89, 144, 233
+ };
+ // 8-bit LUT
+ unsigned char fib_lut8[] = {
+ 0, 1, 1, 2, 3, 5, 8, 13, 21, 34, 55, 89, 144, 233
+ };
- unsigned char fib_lut8[] = {0,
- 1,
- 1,
- 2,
- 3,
- 5,
- 8,
- 13,
- 21,
- 34,
- 55,
- 89,
- 144,
- 233};
-
- for (n=0;n<14;n++) {
- fib_slow = slowfib(n);
- fib_fast = fastfib(n);
- while ((fib_slow != fib_fast) ||
- (fib_fast != fib_lut32[n]) ||
- (fib_fast != fib_lut16[n]) ||
- (fib_fast != fib_lut8[n])) {
- // "FAIL"
- fib_lut32[n] = 0x4C494146;
+ for (n=0;n<max;n++) {
+ slow = fib_slow(n);
+ fast = fib_fast(n);
+ if ((slow != fast) ||
+ (fast != fib_lut32[n]) ||
+ (fast != fib_lut16[n]) ||
+ (fast != fib_lut8[n])) {
+ return -1;
}
- // "PASS"
- fib_lut32[n] = 0x53534150;
}
-
return 0;
}
+/**
+ EUCLIDEAN TEST
+ http://en.literateprograms.org/Euclidean_algorithm_(C)
+
+ This tests for the following:
+ - Modulo arithmetic
+ - Goto
+*/
+
+int euclid_gcd(int a, int b) {
+ if (b > a) goto b_larger;
+ while (1) {
+ a = a % b;
+ if (a == 0) return b;
+ b_larger:
+ b = b % a;
+ if (b == 0) return a;
+ }
+}
+
+int euclid_test(int max)
+{
+ int n;
+ int euclid;
+ // Random Numbers
+ int euclid_a[] = {
+ 1804289383, 1681692777, 1957747793, 719885386, 596516649,
+ 1025202362, 783368690, 2044897763, 1365180540, 304089172,
+ 35005211, 294702567, 336465782, 278722862
+ };
+ int euclid_b[] = {
+ 846930886, 1714636915, 424238335, 1649760492, 1189641421,
+ 1350490027, 1102520059, 1967513926, 1540383426, 1303455736,
+ 521595368, 1726956429, 861021530, 233665123
+ };
+
+ // GCD
+ int euclid_lut[] = {
+ 1, 1, 1, 2, 1, 1, 1, 1, 6, 4, 1, 3, 2, 1
+ };
+
+ for (n=0;n<max;n++) {
+ euclid = euclid_gcd(euclid_a[n],euclid_b[n]);
+ if (euclid != euclid_lut[n]) {
+ return -1;
+ }
+ }
+ return 0;
+}
+
+/**
+ NEWTON-RHAPSON
+ http://en.literateprograms.org/Newton-Raphson's_method_for_root_finding_(C)
+
+ This tests for the following:
+ - Multiplication & Division
+ - Floating point arithmetic
+ - Integer to Float conversion
+*/
+
+float newton_sqrt(float n)
+{
+ float x = 0.0;
+ float xn = 0.0;
+ int iters = 0;
+ int i;
+ for (i = 0; i <= (int)n; ++i)
+ {
+ float val = i*i-n;
+ if (val == 0.0)
+ return i;
+ if (val > 0.0)
+ {
+ xn = (i+(i-1))/2.0;
+ break;
+ }
+ }
+ while (!(iters++ >= 100
+ || x == xn))
+ {
+ x = xn;
+ xn = x - (x * x - n) / (2 * x);
+ }
+ return xn;
+}
+
+int newton_test (int max) {
+ int n;
+ float newt;
+ // 32-bit LUT
+ float newt_lut[] = {
+ 0.000000000000000000000000,
+ 1.000000000000000000000000,
+ 1.414213538169860839843750,
+ 1.732050776481628417968750,
+ 2.000000000000000000000000,
+ 2.236068010330200195312500,
+ 2.449489831924438476562500,
+ 2.645751237869262695312500,
+ 2.828427076339721679687500,
+ 3.000000000000000000000000,
+ 3.162277698516845703125000,
+ 3.316624879837036132812500,
+ 3.464101552963256835937500,
+ 3.605551242828369140625000,
+ 3.741657495498657226562500
+ };
+
+ for (n=0;n<max;n++) {
+ newt = newton_sqrt(n);
+ if (newt != newt_lut[n]) {
+ return -1;
+ }
+ }
+ return 0;
+}
+
+/**
+ MAIN TEST PROGRAMME
+
+ This is the main test procedure. It will output signals onto the
+ MPI port that is checked by the testbench.
+ */
+
+int main ()
+{
+ // Message Passing Port
+ int* mpi = (int*)0xFFFFFFFF;
+
+ // Number of each test to run
+ int max = 5;
+
+ // Fibonacci Test
+ if (fib_test(max) == -1) { *mpi = 0x4C494146; }
+
+ // Euclid Test
+ if (euclid_test(max) == -1) { *mpi = 0x4C494146; }
+
+ // Newton-Rhapson Test
+ if (newton_test(max) == -1) { *mpi = 0x4C494146; }
+
+ // ALL PASSED
+ return 0;
+}
Modified:
gnuradio/branches/developers/matt/u2f/opencores/simple_gpio/rtl/simple_gpio.v
===================================================================
---
gnuradio/branches/developers/matt/u2f/opencores/simple_gpio/rtl/simple_gpio.v
2007-04-28 20:39:47 UTC (rev 5187)
+++
gnuradio/branches/developers/matt/u2f/opencores/simple_gpio/rtl/simple_gpio.v
2007-04-28 21:53:47 UTC (rev 5188)
@@ -143,8 +143,8 @@
always @(posedge clk_i or negedge rst_i)
if (~rst_i)
begin
- ctrl <= #1 {{io}{1'b0}};
- line <= #1 {{io}{1'b0}};
+ ctrl <= #1 {io{1'b0}};
+ line <= #1 {io{1'b0}};
end
else if (wb_wr)
if ( adr_i )
@@ -156,9 +156,9 @@
reg [7:0] dat_o;
always @(posedge clk_i)
if ( adr_i )
- dat_o <= #1 { {{8-io}{1'b0}}, llgpio};
+ dat_o <= #1 { {(8-io){1'b0}}, llgpio};
else
- dat_o <= #1 { {{8-io}{1'b0}}, ctrl};
+ dat_o <= #1 { {(8-io){1'b0}}, ctrl};
reg ack_o;
always @(posedge clk_i or negedge rst_i)
Modified: gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v
2007-04-28 20:39:47 UTC (rev 5187)
+++ gnuradio/branches/developers/matt/u2f/top/u2_basic/u2_basic.v
2007-04-28 21:53:47 UTC (rev 5188)
@@ -271,30 +271,30 @@
// GPIOs -- Slave #3
wire s3_ack_a, s3_ack_b, s3_ack_c, s3_ack_d;
- assign s3_ack = 1'b0;
+ //assign s3_ack = 1'b0;
-/* assign s3_ack = s3_ack_a | s3_ack_b | s3_ack_c | s3_ack_d;
+ assign s3_ack = s3_ack_a | s3_ack_b | s3_ack_c | s3_ack_d;
simple_gpio gpio_a(.clk_i(wb_clk),.rst_i(wb_rst),
-
.cyc_i(s3_cyc),.stb_i(s3_stb&s3_sel[0]),.adr_i(s3_adr),.we_i(s3_we),
+
.cyc_i(s3_cyc),.stb_i(s3_stb&s3_sel[0]),.adr_i(s3_adr[2]),.we_i(s3_we),
.dat_i(s3_dat_o[7:0]),.dat_o(s3_dat_i[7:0]),.ack_o(s3_ack_a),
.gpio(io_tx[7:0]) );
simple_gpio gpio_b(.clk_i(wb_clk),.rst_i(wb_rst),
-
.cyc_i(s3_cyc),.stb_i(s3_stb&s3_sel[1]),.adr_i(s3_adr),.we_i(s3_we),
+
.cyc_i(s3_cyc),.stb_i(s3_stb&s3_sel[1]),.adr_i(s3_adr[2]),.we_i(s3_we),
.dat_i(s3_dat_o[15:8]),.dat_o(s3_dat_i[15:8]),.ack_o(s3_ack_b),
.gpio(io_tx[15:8]) );
simple_gpio gpio_c(.clk_i(wb_clk),.rst_i(wb_rst),
-
.cyc_i(s3_cyc),.stb_i(s3_stb&s3_sel[2]),.adr_i(s3_adr),.we_i(s3_we),
+
.cyc_i(s3_cyc),.stb_i(s3_stb&s3_sel[2]),.adr_i(s3_adr[2]),.we_i(s3_we),
.dat_i(s3_dat_o[23:16]),.dat_o(s3_dat_i[23:16]),.ack_o(s3_ack_c),
.gpio(io_rx[7:0]) );
simple_gpio gpio_d(.clk_i(wb_clk),.rst_i(wb_rst),
-
.cyc_i(s3_cyc),.stb_i(s3_stb&s3_sel[3]),.adr_i(s3_adr),.we_i(s3_we),
+
.cyc_i(s3_cyc),.stb_i(s3_stb&s3_sel[3]),.adr_i(s3_adr[2]),.we_i(s3_we),
.dat_i(s3_dat_o[31:24]),.dat_o(s3_dat_i[31:24]),.ack_o(s3_ack_d),
.gpio(io_rx[15:8]) );
- */
+
//
////////////////////////////////////////////////////////////////////////////////////
// Output control lines, SLAVE #4
// organized in 4 8-bit segments -- clock, serdes, adc, led+misc
Modified: gnuradio/branches/developers/matt/u2f/top/u2_fpga/u2_fpga.ise
===================================================================
(Binary files differ)
Modified: gnuradio/branches/developers/matt/u2f/top/u2_sim/build_flash
===================================================================
--- gnuradio/branches/developers/matt/u2f/top/u2_sim/build_flash
2007-04-28 20:39:47 UTC (rev 5187)
+++ gnuradio/branches/developers/matt/u2f/top/u2_sim/build_flash
2007-04-28 21:53:47 UTC (rev 5188)
@@ -2,11 +2,11 @@
# Based on original from sybreon
# Use different form in hexdump to create the flash image
-mb-gcc -g -mxl-soft-div -mxl-soft-mul -msoft-float -o rom.o $@ && \
+mb-gcc -Wall -O2 -g -mxl-soft-div -mxl-soft-mul -msoft-float -o rom.o $@ && \
mb-objcopy -O binary rom.o rom.bin && \
#hexdump -v -e'1/4 "%.8X\n"' rom.bin > ../sim/aeMB.rom && \
hexdump -v -e'1/1 "%.2X\n"' rom.bin > flash.rom && \
mb-objdump -DSCs rom.o > rom.dump && \
-rm rom.bin && \
+#rm rom.bin && \
#mb-run -tv rom.o 2> rom.run && \
echo "FLASH ROM generated"
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- [Commit-gnuradio] r5188 - in gnuradio/branches/developers/matt/u2f: firmware opencores/aemb/rtl/verilog opencores/aemb/rtl/verilog/CVS opencores/aemb/sim/verilog opencores/aemb/sim/verilog/CVS opencores/aemb/sw/c opencores/aemb/sw/c/CVS opencores/simple_gpio/rtl top/u2_basic top/u2_fpga top/u2_sim,
matt <=