Re: [Discuss-gnuradio] USRP FPGA

[David Carr]

Matt and Eric,

Thanks for the quick response.  I was reading the wiki at 
http://comsec.com/wiki?FpgaToolChain when I came across the JHDL 
reference.  I guess I misinterpreted the context.  I'm much happier to 
hear the code is verilog... off to have a look at it.

-David Carr

Matt Ettus wrote:

> Quoting David Carr <address@hidden>:
>
>  
>
> > Hey all,
> >
> > I'm looking for some more information of the FPGA on the USRP.  I
> > understand the firmware implements 2 up and 2 down converters and some
> > general interface functionality.  I assume these are of the CIC type.
> > What sort of FPGA resources are required?  (How much logic is used in
> > the current device?)
> >    
>
> There are CIC interpolators and decimators, CORDIC up and downconverters,
> halfband interpolators and decimators, fifos and other interfacing stuff right
> now.  More to come.
>
>
>  
>
> > Also, it appears from the wiki that you're using JHDL to code the
> > firmware, is the source available?
> >    
>
> I've never heard of JHDL.  I can assure you that I am using Verilog, and all the
> source is available from the CVS tree on opensdr.sf.net
>
>
> Matt
>
> P.S.  A preliminary run of 20 of the final USRP is in production right now, and
> when those turn out ok, we're going to start full-scale production.
>
>
>
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