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Re: [Qemu-devel] 4G address space remapping on 64-bit host

From: Gwenole Beauchesne
Subject: Re: [Qemu-devel] 4G address space remapping on 64-bit host
Date: Fri, 29 Jun 2007 19:14:41 +0200


2007/6/29, Paul Brook <address@hidden>:
I'd expect the overhead of SIGSEGV+mmap to be prohibitive. I don't have
numbers to back this up, but experience with MIPS system emulation shows that
TLB miss cost can have significant effect on overall performance.

I'd say this can't be worse than on MacOS X where Mach exception
handling is terribly slow. Typically 100 usec per fault
caught+mprotect where Linux requires less than 5 usec to do the same.

Like Fabrice, I think this would be most useful in combination with some sort
of hypervisor.  Somewhere on my TODO list is porting qemu to run directly as
a paravirtual Xen DomU.  This means you can insert the guest pagetable walk
directly into the host mmu fault handler, and do clever things with shadow

This would be great. As Fabrice mentioned, the tricky part would be to
run the translator in the upper part or lower part of the 32-bit
address space. Would fixing compilation with -pie help this (with some
provisions for the dyngen ops) or do you see another means to achieve

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