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From: | Paul Brook |
Subject: | Re: [Qemu-devel] [PATCH] SH: Add prefi, icbi, synco |
Date: | Mon, 20 Oct 2008 17:46:42 +0100 |
User-agent: | KMail/1.9.9 |
> > The only cpu we currently claim to support is SH4. When adding support > > for other cores these should be properly conditionalized. > > Unconditionally implementing additional instructions is a regression. I > > don't consider "we'll fix this at some undefined point in the future" to > > be a good enough answer. > > Can you outline what changes should I make to implement proper > conditionalization? You probably want something like ARM arm_feature, MIPS check_insn or SPARC CHECK_*_FEATURE. Paul
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