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[Qemu-devel] [PATCH v7 3/6] ahci: add support for non-PCI based control
From: |
Mark Langsdorf |
Subject: |
[Qemu-devel] [PATCH v7 3/6] ahci: add support for non-PCI based controllers |
Date: |
Tue, 10 Jan 2012 14:33:16 -0600 |
From: Rob Herring <address@hidden>
Add support for ahci on sysbus.
Signed-off-by: Rob Herring <address@hidden>
Signed-off-by: Mark Langsdorf <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
---
Changes from v5, v6
Skipped
Changes from v4
replaced all references to Plat|plat_ with sysbus_
made the number of ports into a qdev property
added dummy migration support
Changes from v3
Renamed plat-ahci to sysbus-ahci
Changes from v1, v2
Corrected indentation of PlatAHCIState members
Made plat_ahci_info into a single structure, not a list
hw/ide/ahci.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 135d0ee..a3bd4b8 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -25,6 +25,7 @@
#include <hw/msi.h>
#include <hw/pc.h>
#include <hw/pci.h>
+#include <hw/sysbus.h>
#include "monitor.h"
#include "dma.h"
@@ -1214,3 +1215,46 @@ void ahci_reset(void *opaque)
ahci_reset_port(s, i);
}
}
+
+typedef struct sysbus_ahci_state {
+ SysBusDevice busdev;
+ AHCIState ahci;
+ uint32_t num_ports;
+} sysbus_ahci_state;
+
+static const VMStateDescription vmstate_sysbus_ahci = {
+ .name = "sysbus-ahci",
+ .unmigratable = 1,
+};
+
+static int sysbus_ahci_init(SysBusDevice *dev)
+{
+ sysbus_ahci_state *s = FROM_SYSBUS(sysbus_ahci_state, dev);
+ ahci_init(&s->ahci, &dev->qdev, s->num_ports);
+
+ sysbus_init_mmio(dev, &s->ahci.mem);
+ sysbus_init_irq(dev, &s->ahci.irq);
+
+ qemu_register_reset(ahci_reset, &s->ahci);
+ return 0;
+}
+
+static SysBusDeviceInfo sysbus_ahci_info = {
+ .qdev.name = "sysbus-ahci",
+ .qdev.size = sizeof(sysbus_ahci_state),
+ .qdev.vmsd = &vmstate_sysbus_ahci,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_UINT32("num-ports", sysbus_ahci_state, num_ports, 1),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+ .init = sysbus_ahci_init,
+
+
+};
+
+static void sysbus_ahci_register(void)
+{
+ sysbus_register_withprop(&sysbus_ahci_info);
+}
+
+device_init(sysbus_ahci_register);
--
1.7.5.4
- [Qemu-devel] [PATCH 4/6] arm: Add dummy support for co-processor 15's secure config register, (continued)
- [Qemu-devel] [PATCH 4/6] arm: Add dummy support for co-processor 15's secure config register, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v6 2/6] arm: make the number of GIC interrupts configurable, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v2 6/6] arm: Remove incorrect comment in arm_timer, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v5 1/6] Add xgmac ethernet model, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v7 0/6] arm: add support for Calxeda Highbank SoC, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v7 1/6] Add xgmac ethernet model, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v7 4/6] arm: Add dummy support for co-processor 15's secure config register, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v7 5/6] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/11
[Qemu-devel] [PATCH v8 0/6] arm: add support for Calxeda Highbank SoC, Mark Langsdorf, 2012/01/11