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[Qemu-devel] [PATCH 01/12] vexpress, realview: Add (dummy) L2 cache cont
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 01/12] vexpress, realview: Add (dummy) L2 cache controller |
Date: |
Fri, 13 Jan 2012 20:52:38 +0000 |
Instantiate the L2 cache controller on the ARM devboards which have one,
since we have a dummy model of it now. Note that the only non-MP board
with an L2x0 is the PB1176, which we don't model.
Signed-off-by: Peter Maydell <address@hidden>
---
hw/realview.c | 2 ++
hw/vexpress.c | 1 +
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/hw/realview.c b/hw/realview.c
index d4191e9..e52babc 100644
--- a/hw/realview.c
+++ b/hw/realview.c
@@ -225,6 +225,8 @@ static void realview_init(ram_addr_t ram_size,
for (n = 0; n < smp_cpus; n++) {
sysbus_connect_irq(busdev, n, cpu_irq[n]);
}
+ sysbus_create_varargs("l2x0", realview_binfo.smp_priv_base + 0x2000,
+ NULL);
} else {
uint32_t gic_addr = is_pb ? 0x1e000000 : 0x10040000;
/* For now just create the nIRQ GIC, and ignore the others. */
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 0f39d8d..613be65 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -180,6 +180,7 @@ static void vexpress_a9_init(ram_addr_t ram_size,
/* 0x100ec000 TrustZone Address Space Controller */
/* 0x10200000 CoreSight debug APB */
/* 0x1e00a000 PL310 L2 Cache Controller */
+ sysbus_create_varargs("l2x0", 0x1e00a000, NULL);
/* CS0: NOR0 flash : 0x40000000 .. 0x44000000 */
/* CS4: NOR1 flash : 0x44000000 .. 0x48000000 */
--
1.7.1
- Re: [Qemu-devel] [Android-virt] [PATCH 02/12] arm: make the number of GIC interrupts configurable, (continued)
[Qemu-devel] [PATCH 06/12] hw/vexpress.c: Factor out daughterboard-specific initialization, Peter Maydell, 2012/01/13
[Qemu-devel] [PATCH 03/12] hw/arm_boot.c: Make SMP boards specify address to poll in bootup loop, Peter Maydell, 2012/01/13
Re: [Qemu-devel] [PATCH 03/12] hw/arm_boot.c: Make SMP boards specify address to poll in bootup loop, andrzej zaborowski, 2012/01/16
[Qemu-devel] [PATCH 08/12] hw/a15mpcore.c: Add Cortex-A15 private peripheral model, Peter Maydell, 2012/01/13
[Qemu-devel] [PATCH 01/12] vexpress, realview: Add (dummy) L2 cache controller,
Peter Maydell <=
[Qemu-devel] [PATCH 07/12] hw/vexpress.c: Instantiate the motherboard CLCD, Peter Maydell, 2012/01/13
[Qemu-devel] [PATCH 12/12] hw/vexpress.c: Add vexpress-a15 machine, Peter Maydell, 2012/01/13
[Qemu-devel] [PATCH 05/12] hw/vexpress.c: Move secondary CPU boot code to SRAM, Peter Maydell, 2012/01/13
[Qemu-devel] [PATCH 11/12] arm_boot: Pass base address of GIC CPU interface, not whole GIC, Peter Maydell, 2012/01/13
Re: [Qemu-devel] [PATCH 00/12] Add support for Cortex-A15 and vexpress-a15, Peter Maydell, 2012/01/13