[Qemu-devel] [Bug 942659] Re: ARM: CORTEX M, PRIMASK does not disable interrupts

[Peter Maydell]

> This change changes the behaviour for non-M-profile cores

...or maybe not: I was confused by the resemblance to that other patch.
I still think one-line fixes are unlikely to be the right approach here,
though.

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https://bugs.launchpad.net/bugs/942659

Title:
  ARM: CORTEX M, PRIMASK does not disable interrupts

Status in QEMU:
  New

Bug description:
  qemu version 0.15.1
  but the same code is in qemu 1.0

  "CPSID I" does not disable interrupts for CORTEX M3

  
  if (interrupt_request & CPU_INTERRUPT_HARD
                          && ((IS_M(env) && env->regs[15] < 0xfffffff0)
                              || !(env->uncached_cpsr & CPSR_I))) {
                          env->exception_index = EXCP_IRQ;
                          do_interrupt(env);
                          next_tb = 0;
                      }

  
  do_interrupt() will be executed even if (env->uncached_cpsr & CPSR_I) == 1 , 
disable interrupt bit set.

  
  then changed to: 

  if (interrupt_request & CPU_INTERRUPT_HARD 
                          && !(env->uncached_cpsr & CPSR_I)
                          && (IS_M(env) ? env->regs[15] < 0xfffffff0: 1) ) {
                          env->exception_index = EXCP_IRQ;
                          do_interrupt(env);
                          next_tb = 0;
                      }

  works

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