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[Qemu-devel] [Bug 942659] Re: ARM: CORTEX M, PRIMASK does not disable in
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [Bug 942659] Re: ARM: CORTEX M, PRIMASK does not disable interrupts |
Date: |
Tue, 28 Feb 2012 15:12:29 -0000 |
This change changes the behaviour for non-M-profile cores, which looks
wrong.
See discussion in this mailing list thread where a similar patch was suggested:
http://lists.gnu.org/archive/html/qemu-devel/2011-06/msg00500.html
M profile interrupt handling is known-broken. I'm not accepting any
patches in this area unless they come attached to a decent explanation
of why they are the correct change to make and show some evidence of the
whole problem having been considered.
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https://bugs.launchpad.net/bugs/942659
Title:
ARM: CORTEX M, PRIMASK does not disable interrupts
Status in QEMU:
New
Bug description:
qemu version 0.15.1
but the same code is in qemu 1.0
"CPSID I" does not disable interrupts for CORTEX M3
if (interrupt_request & CPU_INTERRUPT_HARD
&& ((IS_M(env) && env->regs[15] < 0xfffffff0)
|| !(env->uncached_cpsr & CPSR_I))) {
env->exception_index = EXCP_IRQ;
do_interrupt(env);
next_tb = 0;
}
do_interrupt() will be executed even if (env->uncached_cpsr & CPSR_I) == 1 ,
disable interrupt bit set.
then changed to:
if (interrupt_request & CPU_INTERRUPT_HARD
&& !(env->uncached_cpsr & CPSR_I)
&& (IS_M(env) ? env->regs[15] < 0xfffffff0: 1) ) {
env->exception_index = EXCP_IRQ;
do_interrupt(env);
next_tb = 0;
}
works
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