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[Qemu-devel] [PATCH 018/147] target-s390: Implement ADD LOGICAL WITH SIG
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 018/147] target-s390: Implement ADD LOGICAL WITH SIGNED IMMEDIATE |
Date: |
Thu, 27 Sep 2012 15:39:59 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-s390x/insn-data.def | 5 +++++
target-s390x/translate.c | 7 +++++++
2 files changed, 12 insertions(+)
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index 44e1ca7..acde181 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -35,6 +35,11 @@
/* ADD LOGICAL IMMEDIATE */
C(0xc20b, ALFI, RIL_a, EI, r1, i2_32u, new, r1_32, add, addu32)
C(0xc20a, ALGFI, RIL_a, EI, r1, i2_32u, r1, 0, add, addu64)
+/* ADD LOGICAL WITH SIGNED IMMEDIATE */
+ C(0xeb6e, ALSI, SIY, GIE, m1_32u, i2, new, m1_32, add, addu32)
+ C(0xecda, ALHSIK, RIE_d, DO, r3, i2, new, r1_32, add, addu32)
+ C(0xeb7e, ALGSI, SIY, GIE, m1_64, i2, new, m1_64, add, addu64)
+ C(0xecdb, ALGHSIK, RIE_d, DO, r3, i2, r1, 0, add, addu64)
/* SUBTRACT */
C(0x1b00, SR, RR_a, Z, r1, r2, new, r1_32, sub, subs32)
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 34c1ab8..38d8e6d 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -5005,6 +5005,13 @@ static void in1_m1_32s(DisasContext *s, DisasFields *f,
DisasOps *o)
tcg_gen_qemu_ld32s(o->in1, o->addr1, get_mem_index(s));
}
+static void in1_m1_32u(DisasContext *s, DisasFields *f, DisasOps *o)
+{
+ in1_la1(s, f, o);
+ o->in1 = tcg_temp_new_i64();
+ tcg_gen_qemu_ld32u(o->in1, o->addr1, get_mem_index(s));
+}
+
static void in1_m1_64(DisasContext *s, DisasFields *f, DisasOps *o)
{
in1_la1(s, f, o);
--
1.7.11.4
- [Qemu-devel] [PATCH 011/147] target-s390: Tidy unconditional BRCL, (continued)
- [Qemu-devel] [PATCH 011/147] target-s390: Tidy unconditional BRCL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 010/147] target-s390: Fix BCR, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 007/147] target-s390: Use TCG registers for FPR, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 014/147] target-s390: Split o ut disas_jcc, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 017/147] target-s390: Implement SUBTRACT HALFWORD, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 016/147] target-s390: Convert ADD HALFWORD, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 012/147] target-s390: Fix PSW_MASK handling, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 013/147] target-s390: Add format based disassassmbly infrastructure, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 021/147] target-s390: Convert 64-bit MULTIPLY LOGICAL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 020/147] target-s390: Convert 32-bit MULTIPLY, MULTIPLY LOGICAL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 018/147] target-s390: Implement ADD LOGICAL WITH SIGNED IMMEDIATE,
Richard Henderson <=
- [Qemu-devel] [PATCH 019/147] target-s390: Convert MULTIPLY HALFWORD, SINGLE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 015/147] target-s390: Reorg exception handling, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 022/147] target-s390: Convert AND, OR, XOR, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 023/147] target-s390: Convert COMPARE, COMPARE LOGICAL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 025/147] target-s390: Convert LOAD ADDRESS, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 030/147] target-s390: Convert AND, OR, XOR, INSERT IMMEDIATE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 031/147] target-s390: Convert STORE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 027/147] target-s390: Convert LOAD AND TEST, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 032/147] target-s390: Convert ADD LOGICAL CARRY and SUBTRACT LOGICAL BORROW, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 026/147] target-s390: Convert LOAD (LOGICAL) BYTE, CHARACTER, HALFWORD, Richard Henderson, 2012/09/27