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[Qemu-devel] [PATCH 012/147] target-s390: Fix PSW_MASK handling
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 012/147] target-s390: Fix PSW_MASK handling |
Date: |
Thu, 27 Sep 2012 15:39:53 -0700 |
We were treating psw.mask as the 32-bit quantity it is in ESA mode.
In particular, the CC field was at the wrong place.
Signed-off-by: Richard Henderson <address@hidden>
---
target-s390x/helper.c | 9 +++++----
target-s390x/translate.c | 2 ++
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index 22256b0..27c3123 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -454,18 +454,19 @@ void load_psw(CPUS390XState *env, uint64_t mask, uint64_t
addr)
env->psw.addr = addr;
env->psw.mask = mask;
- env->cc_op = (mask >> 13) & 3;
+ env->cc_op = (mask >> 44) & 3;
}
static uint64_t get_psw_mask(CPUS390XState *env)
{
- uint64_t r = env->psw.mask;
+ uint64_t r;
env->cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst,
env->cc_vr);
- r &= ~(3ULL << 13);
+ r = env->psw.mask;
+ r &= ~PSW_MASK_CC;
assert(!(env->cc_op & ~3));
- r |= env->cc_op << 13;
+ r |= (uint64_t)env->cc_op << 44;
return r;
}
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 5a7612c..e140c79 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -4559,6 +4559,8 @@ static void disas_s390_insn(CPUS390XState *env,
DisasContext *s)
tcg_gen_qemu_ld32u(tmp2, tmp, get_mem_index(s));
tcg_gen_addi_i64(tmp, tmp, 4);
tcg_gen_qemu_ld32u(tmp3, tmp, get_mem_index(s));
+ /* Convert the 32-bit PSW_MASK into the 64-bit PSW_MASK. */
+ tcg_gen_shli_i64(tmp2, tmp2, 32);
gen_helper_load_psw(cpu_env, tmp2, tmp3);
tcg_temp_free_i64(tmp);
tcg_temp_free_i64(tmp2);
--
1.7.11.4
- [Qemu-devel] [PATCH 008/147] target-s390: Register helpers, (continued)
- [Qemu-devel] [PATCH 008/147] target-s390: Register helpers, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 005/147] target-s390: Fix gdbstub, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 009/147] target-s390: Fix SACF exit, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 006/147] target-s390: Add missing temp_free in gen_op_calc_cc, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 011/147] target-s390: Tidy unconditional BRCL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 010/147] target-s390: Fix BCR, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 007/147] target-s390: Use TCG registers for FPR, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 014/147] target-s390: Split o ut disas_jcc, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 017/147] target-s390: Implement SUBTRACT HALFWORD, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 016/147] target-s390: Convert ADD HALFWORD, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 012/147] target-s390: Fix PSW_MASK handling,
Richard Henderson <=
- [Qemu-devel] [PATCH 013/147] target-s390: Add format based disassassmbly infrastructure, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 021/147] target-s390: Convert 64-bit MULTIPLY LOGICAL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 020/147] target-s390: Convert 32-bit MULTIPLY, MULTIPLY LOGICAL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 018/147] target-s390: Implement ADD LOGICAL WITH SIGNED IMMEDIATE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 019/147] target-s390: Convert MULTIPLY HALFWORD, SINGLE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 015/147] target-s390: Reorg exception handling, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 022/147] target-s390: Convert AND, OR, XOR, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 023/147] target-s390: Convert COMPARE, COMPARE LOGICAL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 025/147] target-s390: Convert LOAD ADDRESS, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 030/147] target-s390: Convert AND, OR, XOR, INSERT IMMEDIATE, Richard Henderson, 2012/09/27