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[Qemu-devel] [PATCH 05/60] softfloat: Add stubs for int16 conversion
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PATCH 05/60] softfloat: Add stubs for int16 conversion |
Date: |
Fri, 27 Sep 2013 02:47:59 +0200 |
On AArch64 we have a few instructions that can convert between floats
and 16 bit integers. Add stubs in the softfloat code to handle these,
but don't add code to actually do so. Instead, any call to them will
assert(0) for now.
This stub implementation should be replaced by something that actually
does something useful by someone who understands softfloat later.
Signed-off-by: Alexander Graf <address@hidden>
---
fpu/softfloat.c | 21 +++++++++++++++++++++
include/fpu/softfloat.h | 4 ++++
2 files changed, 25 insertions(+)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 7ba51b6..3e6f219 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -41,6 +41,7 @@ these four paragraphs for those parts of this code that are
retained.
#include "config.h"
#include "fpu/softfloat.h"
+#include "assert.h"
/*----------------------------------------------------------------------------
| Primitive arithmetic functions, including multi-word arithmetic, and
@@ -1378,6 +1379,11 @@ int32 float32_to_int32( float32 a STATUS_PARAM )
}
+int_fast16_t float32_to_int16( float32 a STATUS_PARAM )
+{
+ assert(0);
+}
+
/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
| `a' to the 32-bit two's complement integer format. The conversion is
@@ -2762,6 +2768,11 @@ int32 float64_to_int32( float64 a STATUS_PARAM )
}
+int_fast16_t float64_to_int16( float64 a STATUS_PARAM )
+{
+ assert(0);
+}
+
/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the 32-bit two's complement integer format. The conversion is
@@ -6446,6 +6457,11 @@ uint32 float32_to_uint32( float32 a STATUS_PARAM )
return res;
}
+uint_fast16_t float32_to_uint16( float32 a STATUS_PARAM )
+{
+ assert(0);
+}
+
uint32 float32_to_uint32_round_to_zero( float32 a STATUS_PARAM )
{
int64_t v;
@@ -6500,6 +6516,11 @@ uint32 float64_to_uint32( float64 a STATUS_PARAM )
return res;
}
+uint_fast16_t float64_to_uint16( float64 a STATUS_PARAM )
+{
+ assert(0);
+}
+
uint32 float64_to_uint32_round_to_zero( float64 a STATUS_PARAM )
{
int64_t v;
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index f3927e2..b3c85f4 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -268,6 +268,8 @@ extern const float16 float16_default_nan;
int_fast16_t float32_to_int16_round_to_zero(float32 STATUS_PARAM);
uint_fast16_t float32_to_uint16_round_to_zero(float32 STATUS_PARAM);
int32 float32_to_int32( float32 STATUS_PARAM );
+int_fast16_t float32_to_int16( float32 STATUS_PARAM );
+uint_fast16_t float32_to_uint16( float32 STATUS_PARAM );
int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM );
uint32 float32_to_uint32( float32 STATUS_PARAM );
uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM );
@@ -373,6 +375,8 @@ int_fast16_t float64_to_int16_round_to_zero(float64
STATUS_PARAM);
uint_fast16_t float64_to_uint16_round_to_zero(float64 STATUS_PARAM);
int32 float64_to_int32( float64 STATUS_PARAM );
int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM );
+int_fast16_t float64_to_int16( float64 STATUS_PARAM );
+uint_fast16_t float64_to_uint16( float64 STATUS_PARAM );
uint32 float64_to_uint32( float64 STATUS_PARAM );
uint32 float64_to_uint32_round_to_zero( float64 STATUS_PARAM );
int64 float64_to_int64( float64 STATUS_PARAM );
--
1.7.12.4
- [Qemu-devel] [PATCH 00/60] AArch64 TCG emulation support, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 14/60] AArch64: Add orr instruction emulation, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 02/60] arm: Give the fpscr rounding modes names, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 01/60] arm: Use symbolic device names for vfp cmp, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 13/60] AArch64: Add stubs for a64 specific helpers, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 10/60] AArch64: Add handling for br instructions, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 05/60] softfloat: Add stubs for int16 conversion,
Alexander Graf <=
- [Qemu-devel] [PATCH 12/60] AArch64: Add ldarx style instruction emulation, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 09/60] AArch64: Add b and bl handling, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 08/60] AArch64: Add support to print VFP registers in CPU, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 22/60] AArch64: Add AdvSIMD scalar three same group handling, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 11/60] AArch64: Add STP instruction emulation, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 04/60] arm: Add AArch64 disassembler stub, Alexander Graf, 2013/09/26