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[Qemu-devel] [PATCH v3 3/8] hw/pci-bridge: set PCI_INTERRUPT_PIN registe
From: |
Marcel Apfelbaum |
Subject: |
[Qemu-devel] [PATCH v3 3/8] hw/pci-bridge: set PCI_INTERRUPT_PIN register before shpc init |
Date: |
Mon, 7 Oct 2013 10:36:36 +0300 |
The PCI_INTERRUPT_PIN will be used by shpc init, so
was moved before the call to shpc_init.
Signed-off-by: Marcel Apfelbaum <address@hidden>
---
hw/pci-bridge/pci_bridge_dev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c
index a9392c7..440e187 100644
--- a/hw/pci-bridge/pci_bridge_dev.c
+++ b/hw/pci-bridge/pci_bridge_dev.c
@@ -53,6 +53,7 @@ static int pci_bridge_dev_initfn(PCIDevice *dev)
if (err) {
goto bridge_error;
}
+ dev->config[PCI_INTERRUPT_PIN] = 0x1;
memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar",
shpc_bar_size(dev));
err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0);
if (err) {
@@ -73,7 +74,6 @@ static int pci_bridge_dev_initfn(PCIDevice *dev)
* Check whether that works well. */
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar);
- dev->config[PCI_INTERRUPT_PIN] = 0x1;
return 0;
msi_error:
slotid_cap_cleanup(dev);
--
1.8.3.1
- [Qemu-devel] [PATCH v3 0/8] hw/pci: set irq without selecting INTx pin, Marcel Apfelbaum, 2013/10/07
- [Qemu-devel] [PATCH v3 5/8] hw/vfio: set interrupts using pci irq wrappers, Marcel Apfelbaum, 2013/10/07
- [Qemu-devel] [PATCH v3 7/8] hw/pcie: AER and hot-plug events must use device's interrupt, Marcel Apfelbaum, 2013/10/07
- [Qemu-devel] [PATCH v3 8/8] hw/pci: removed irq field from PCIDevice, Marcel Apfelbaum, 2013/10/07
- Re: [Qemu-devel] [PATCH v3 0/8] hw/pci: set irq without selecting INTx pin, Michael S. Tsirkin, 2013/10/07
- Re: [Qemu-devel] [PATCH v3 0/8] hw/pci: set irq without selecting INTx pin, Michael S. Tsirkin, 2013/10/08