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[Qemu-devel] [PULL 074/118] spapr: Add ibm, chip-id property in device t
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 074/118] spapr: Add ibm, chip-id property in device tree |
Date: |
Wed, 4 Jun 2014 14:44:15 +0200 |
From: Alexey Kardashevskiy <address@hidden>
This adds a "ibm,chip-id" property for CPU nodes which should be the same
for all cores in the same CPU socket. The recent guest kernels use this
information to associate threads with sockets.
Refer to the kernel commit 256f2d4b463d3030ebc8d2b54f427543814a2bdc
for more details.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
hw/ppc/spapr.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index fba8686..877e1f0 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -313,6 +313,9 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base,
uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
int i, smt = kvmppc_smt_threads();
unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
+ QemuOpts *opts = qemu_opts_find(qemu_find_opts("smp-opts"), NULL);
+ unsigned sockets = opts ? qemu_opt_get_number(opts, "sockets", 0) : 0;
+ uint32_t cpus_per_socket = sockets ? (smp_cpus / sockets) : 1;
fdt = g_malloc0(FDT_MAX_SIZE);
_FDT((fdt_create(fdt, FDT_MAX_SIZE)));
@@ -470,6 +473,9 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base,
page_sizes_prop, page_sizes_prop_size)));
}
+ _FDT((fdt_property_cell(fdt, "ibm,chip-id",
+ cs->cpu_index / cpus_per_socket)));
+
_FDT((fdt_end_node(fdt)));
}
--
1.8.1.4
- [Qemu-devel] [PULL 063/118] PPC: Fail on leaking temporaries, (continued)
- [Qemu-devel] [PULL 063/118] PPC: Fail on leaking temporaries, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 065/118] PPC: Add definitions for GIVORs, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 051/118] target-ppc: Introduce DFP Shift Significand, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 060/118] PPC: e500: some pci related cleanup, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 055/118] util: Add InvMixColumns, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 067/118] PPC: Add L1CFG1 SPR emulation, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 058/118] target-ppc: Refactor AES Instructions, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 064/118] PPC: Make all e500 CPUs SVR aware, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 066/118] PPC: Fix SPR access control of L1CFG0, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 074/118] spapr: Add ibm, chip-id property in device tree,
Alexander Graf <=
- [Qemu-devel] [PULL 069/118] PPC: Add dcbtls emulation, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 073/118] spapr: Add support for time base offset migration, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 061/118] PPC: e500: implement PCI INTx routing, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 072/118] PPC: e500: Move to u-boot as firmware, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 068/118] PPC: Properly emulate L1CSR0 and L1CSR1, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 070/118] PPC: e500: Expose kernel load address in dt, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 071/118] PPC: Add u-boot firmware for e500, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 015/118] libdecnumber: Introduce libdecnumber Code, Alexander Graf, 2014/06/04
- Re: [Qemu-devel] [PULL 00/118] ppc patch queue 2014-06-04, Peter Maydell, 2014/06/05