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[Qemu-devel] [PATCH 02/15] hw/arm/vexpress.c: Wire FIQ between CPU <> GI
From: |
Fabian Aggeler |
Subject: |
[Qemu-devel] [PATCH 02/15] hw/arm/vexpress.c: Wire FIQ between CPU <> GIC |
Date: |
Fri, 22 Aug 2014 12:29:39 +0200 |
Connect FIQ output of the GIC CPU interfaces to the CPUs.
Signed-off-by: Fabian Aggeler <address@hidden>
---
hw/arm/vexpress.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index a88732c..bafe8d2 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -229,6 +229,8 @@ static void init_cpus(const char *cpu_model, const char
*privdev,
DeviceState *cpudev = DEVICE(qemu_get_cpu(n));
sysbus_connect_irq(busdev, n, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
+ sysbus_connect_irq(busdev, n+smp_cpus,
+ qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
}
}
--
1.8.3.2
- [Qemu-devel] [PATCH 00/15] target-arm: Add GICv1/SecExt and GICv2/Grouping, Fabian Aggeler, 2014/08/22
- [Qemu-devel] [PATCH 02/15] hw/arm/vexpress.c: Wire FIQ between CPU <> GIC,
Fabian Aggeler <=
- [Qemu-devel] [PATCH 15/15] hw/intc/arm_gic: add gic_update() for grouping, Fabian Aggeler, 2014/08/22
- [Qemu-devel] [PATCH 10/15] hw/intc/arm_gic: Handle grouping for GICC_HPPIR, Fabian Aggeler, 2014/08/22
- [Qemu-devel] [PATCH 04/15] hw/intc/arm_gic: Add ns_access() function, Fabian Aggeler, 2014/08/22
- [Qemu-devel] [PATCH 05/15] hw/intc/arm_gic: Add Interrupt Group Registers, Fabian Aggeler, 2014/08/22
- [Qemu-devel] [PATCH 06/15] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked, Fabian Aggeler, 2014/08/22
- [Qemu-devel] [PATCH 08/15] hw/intc/arm_gic: Make ICCBPR/GICC_BPR banked, Fabian Aggeler, 2014/08/22
- [Qemu-devel] [PATCH 12/15] hw/intc/arm_gic: Change behavior of IAR writes, Fabian Aggeler, 2014/08/22
- [Qemu-devel] [PATCH 11/15] hw/intc/arm_gic: Change behavior of EOIR writes, Fabian Aggeler, 2014/08/22
- [Qemu-devel] [PATCH 01/15] hw/intc/arm_gic: Request FIQ sources, Fabian Aggeler, 2014/08/22