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[Qemu-devel] [PATCH for-2.5 18/30] m68k: addq/subq can work with all the
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH for-2.5 18/30] m68k: addq/subq can work with all the data sizes. |
Date: |
Sun, 9 Aug 2015 22:13:37 +0200 |
Improve TCG constant use by creating only once for several uses.
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/translate.c | 46 +++++++++++++++++++++++++++-------------------
1 file changed, 27 insertions(+), 19 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 9e379b3..ae57792 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1778,40 +1778,48 @@ DISAS_INSN(jump)
DISAS_INSN(addsubq)
{
- TCGv src1;
- TCGv src2;
+ TCGv src;
TCGv dest;
- int val;
+ TCGv val;
+ int imm;
TCGv addr;
+ int opsize;
- SRC_EA(env, src1, OS_LONG, 0, &addr);
- val = (insn >> 9) & 7;
- if (val == 0)
- val = 8;
+ if ((insn & 070) == 010) {
+ /* Operation on address register is always long. */
+ opsize = OS_LONG;
+ } else {
+ opsize = insn_opsize(insn, 6);
+ }
+ SRC_EA(env, src, opsize, -1, &addr);
+ imm = (insn >> 9) & 7;
+ if (imm == 0) {
+ imm = 8;
+ }
+ val = tcg_const_i32(imm);
dest = tcg_temp_new();
- tcg_gen_mov_i32(dest, src1);
+ tcg_gen_mov_i32(dest, src);
if ((insn & 0x38) == 0x08) {
/* Don't update condition codes if the destination is an
address register. */
if (insn & 0x0100) {
- tcg_gen_subi_i32(dest, dest, val);
+ tcg_gen_sub_i32(dest, dest, val);
} else {
- tcg_gen_addi_i32(dest, dest, val);
+ tcg_gen_add_i32(dest, dest, val);
}
} else {
- src2 = tcg_const_i32(val);
if (insn & 0x0100) {
- SET_X_FLAG(OS_LONG, dest, tcg_const_i32(val));
- tcg_gen_subi_i32(dest, dest, val);
- set_cc_op(s, CC_OP_SUB);
+ SET_X_FLAG(opsize, dest, val);
+ tcg_gen_sub_i32(dest, dest, val);
+ SET_CC_OP(opsize, SUB);
} else {
- tcg_gen_addi_i32(dest, dest, val);
- SET_X_FLAG(OS_LONG, dest, tcg_const_i32(val));
- SET_CC_OP(OS_LONG, ADD);
+ tcg_gen_add_i32(dest, dest, val);
+ SET_X_FLAG(opsize, dest, val);
+ SET_CC_OP(opsize, ADD);
}
- gen_update_cc_add(dest, src2);
+ gen_update_cc_add(dest, val);
}
- DEST_EA(env, insn, OS_LONG, dest, &addr);
+ DEST_EA(env, insn, opsize, dest, &addr);
}
DISAS_INSN(tpf)
--
2.4.3
- Re: [Qemu-devel] [PATCH for-2.5 15/30] m68k: add more modes to movem, (continued)
[Qemu-devel] [PATCH for-2.5 08/30] m68k: update CPU flags management, Laurent Vivier, 2015/08/09
Re: [Qemu-devel] [PATCH for-2.5 08/30] m68k: update CPU flags management, Laurent Vivier, 2015/08/13
[Qemu-devel] [PATCH for-2.5 17/30] m68k: ori/andi/subi/addi/eori/cmpi can modify SR/CCR, Laurent Vivier, 2015/08/09
[Qemu-devel] [PATCH for-2.5 18/30] m68k: addq/subq can work with all the data sizes.,
Laurent Vivier <=
[Qemu-devel] [PATCH for-2.5 16/30] m68k: Add all access modes and data sizes to some 680x0 instructions, Laurent Vivier, 2015/08/09
[Qemu-devel] [PATCH for-2.5 20/30] m68k: add exg, Laurent Vivier, 2015/08/09
[Qemu-devel] [PATCH for-2.5 21/30] m68k: add bkpt, Laurent Vivier, 2015/08/09