[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 05/28] target-i386: Use uint32_t for X86CPU.apic_id
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL 05/28] target-i386: Use uint32_t for X86CPU.apic_id |
Date: |
Wed, 20 Jul 2016 12:08:11 -0300 |
From: Igor Mammedov <address@hidden>
Redo 9886e834 (target-i386: Require APIC ID to be explicitly set before
CPU realize) in another way that doesn't use int64_t to detect
if apic-id property has been set.
Use the fact that 0xFFFFFFFF is the broadcast
value that a CPU can't have and set default
uint32_t apic_id to it instead of using int64_t.
Later uint32_t apic_id will be used to drop custom
property setter/getter in favor of static property.
Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
---
target-i386/cpu.c | 4 ++--
target-i386/cpu.h | 7 ++++++-
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 5ac7e97..5fc01c6 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2946,7 +2946,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error
**errp)
goto out;
}
- if (cpu->apic_id < 0) {
+ if (cpu->apic_id == UNASSIGNED_APIC_ID) {
error_setg(errp, "apic-id property was not initialized properly");
return;
}
@@ -3254,7 +3254,7 @@ static void x86_cpu_initfn(Object *obj)
#ifndef CONFIG_USER_ONLY
/* Any code creating new X86CPU objects have to set apic-id explicitly */
- cpu->apic_id = -1;
+ cpu->apic_id = UNASSIGNED_APIC_ID;
#endif
for (w = 0; w < FEATURE_WORDS; w++) {
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index b2ab8bf..10d562d 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -845,6 +845,11 @@ typedef struct {
#define NB_OPMASK_REGS 8
+/* CPU can't have 0xFFFFFFFF APIC ID, use that value to distinguish
+ * that APIC ID hasn't been set yet
+ */
+#define UNASSIGNED_APIC_ID 0xFFFFFFFF
+
typedef union X86LegacyXSaveArea {
struct {
uint16_t fcw;
@@ -1174,7 +1179,7 @@ struct X86CPU {
bool expose_kvm;
bool migratable;
bool host_features;
- int64_t apic_id;
+ uint32_t apic_id;
/* if true the CPUID code directly forward host cache leaves to the guest
*/
bool cache_info_passthrough;
--
2.5.5
- [Qemu-devel] [PULL v2 00/28] x86 queue, 2016-07-20, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 01/28] target-i386: Provide TCG_PHYS_ADDR_BITS, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 02/28] target-i386: Allow physical address bits to be set, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 03/28] target-i386: Mask mtrr mask based on CPU physical address limits, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 04/28] target-i386: Fill high bits of mtrr mask, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 05/28] target-i386: Use uint32_t for X86CPU.apic_id,
Eduardo Habkost <=
- [Qemu-devel] [PULL 06/28] pc: Add x86_topo_ids_from_apicid(), Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 07/28] target-i386: Set physical address bits based on host, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 08/28] pc: Extract CPU lookup into a separate function, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 09/28] pc: cpu: Consolidate apic-id validity checks in pc_cpu_pre_plug(), Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 10/28] target-i386: Replace custom apic-id setter/getter with static property, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 11/28] target-i386: Add socket/core/thread properties to X86CPU, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 12/28] target-i386: Add support for UMIP and RDPID CPUID bits, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 13/28] target-i386: cpu: Do not ignore error and fix apic parent, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 14/28] target-i386: Fix apic object leak when CPU is deleted, Eduardo Habkost, 2016/07/20
- [Qemu-devel] [PULL 15/28] pc: Set APIC ID based on socket/core/thread ids if it's not been set yet, Eduardo Habkost, 2016/07/20