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[Qemu-devel] [PATCH RFC v1 12/29] target-arc: RLC, RRC
From: |
Michael Rolnik |
Subject: |
[Qemu-devel] [PATCH RFC v1 12/29] target-arc: RLC, RRC |
Date: |
Fri, 9 Sep 2016 01:31:53 +0300 |
Signed-off-by: Michael Rolnik <address@hidden>
---
target-arc/translate-inst.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
target-arc/translate-inst.h | 2 ++
2 files changed, 59 insertions(+)
diff --git a/target-arc/translate-inst.c b/target-arc/translate-inst.c
index 91b7037..a0d601e 100644
--- a/target-arc/translate-inst.c
+++ b/target-arc/translate-inst.c
@@ -1308,3 +1308,60 @@ int arc_gen_BXOR(DisasCtxt *ctx, TCGv dest, TCGv src1,
TCGv src2)
return BS_NONE;
}
+/*
+ RLC
+*/
+int arc_gen_RLC(DisasCtxt *ctx, TCGv dest, TCGv src1)
+{
+ TCGv rslt = dest;
+
+ if (TCGV_EQUAL(dest, src1)) {
+ rslt = tcg_temp_new_i32();
+ }
+
+ tcg_gen_shli_tl(rslt, src1, 1);
+ tcg_gen_or_tl(rslt, rslt, cpu_Cf);
+
+ if (ctx->opt.f) {
+ tcg_gen_setcond_tl(TCG_COND_EQ, cpu_Zf, rslt, ctx->zero);
+ tcg_gen_shri_tl(cpu_Nf, rslt, 31);
+ tcg_gen_shri_tl(cpu_Cf, src1, 31);
+ }
+
+ if (!TCGV_EQUAL(dest, rslt)) {
+ tcg_gen_mov_tl(dest, rslt);
+ tcg_temp_free_i32(rslt);
+ }
+
+ return BS_NONE;
+}
+
+/*
+ RRC
+*/
+int arc_gen_RRC(DisasCtxt *ctx, TCGv dest, TCGv src1)
+{
+ TCGv rslt = dest;
+
+ if (TCGV_EQUAL(dest, src1)) {
+ rslt = tcg_temp_new_i32();
+ }
+
+ tcg_gen_andi_tl(rslt, src1, 0xfffffffe);
+ tcg_gen_or_tl(rslt, rslt, cpu_Cf);
+ tcg_gen_rotri_tl(rslt, rslt, 1);
+
+ if (ctx->opt.f) {
+ tcg_gen_setcond_tl(TCG_COND_EQ, cpu_Zf, rslt, ctx->zero);
+ tcg_gen_shri_tl(cpu_Nf, rslt, 31);
+ tcg_gen_andi_tl(cpu_Cf, src1, 1);
+ }
+
+ if (!TCGV_EQUAL(dest, rslt)) {
+ tcg_gen_mov_tl(dest, rslt);
+ tcg_temp_free_i32(rslt);
+ }
+
+ return BS_NONE;
+}
+
diff --git a/target-arc/translate-inst.h b/target-arc/translate-inst.h
index 88cae1c..5e1c52d 100644
--- a/target-arc/translate-inst.h
+++ b/target-arc/translate-inst.h
@@ -84,3 +84,5 @@ int arc_gen_BSET(DisasCtxt *c, TCGv dest, TCGv src1, TCGv
src2);
int arc_gen_BTST(DisasCtxt *c, TCGv src1, TCGv src2);
int arc_gen_BXOR(DisasCtxt *c, TCGv dest, TCGv src1, TCGv src2);
+int arc_gen_RRC(DisasCtxt *c, TCGv dest, TCGv src1);
+int arc_gen_RLC(DisasCtxt *c, TCGv dest, TCGv src1);
--
2.4.9 (Apple Git-60)
- [Qemu-devel] [PATCH RFC v1 05/29] target-arc: ASL(m), ASR(m), LSR(m), ROR(m), (continued)
- [Qemu-devel] [PATCH RFC v1 05/29] target-arc: ASL(m), ASR(m), LSR(m), ROR(m), Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 08/29] target-arc: MOV, EXT, SEX, SWAP, Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 10/29] target-arc: POP, PUSH, Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 11/29] target-arc: BCLR, BMSK, BSET, BTST, BXOR, Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 13/29] target-arc: NORM, NORMW, Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 15/29] target-arc: MUL64, MULU64, DIVAW, Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 12/29] target-arc: RLC, RRC,
Michael Rolnik <=
- [Qemu-devel] [PATCH RFC v1 14/29] target-arc: MPY, MPYH, MPYHU, MPYU, Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 16/29] target-arc: BBIT0, BBIT1, BR, Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 18/29] target-arc: J, JL, Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 17/29] target-arc: B, BL, Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 19/29] target-arc: LR, SR, Michael Rolnik, 2016/09/08
- [Qemu-devel] [PATCH RFC v1 22/29] target-arc: ASLS, ASRS, Michael Rolnik, 2016/09/08
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