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Re: [Qemu-devel] [PATCH v3 11/11] tcg-mips: Adjust condition functions f
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH v3 11/11] tcg-mips: Adjust condition functions for mips64 |
Date: |
Fri, 25 Nov 2016 15:25:54 +0100 |
User-agent: |
NeoMutt/20161104 (1.7.1) |
On 2016-11-25 13:06, Richard Henderson wrote:
> On 11/25/2016 04:31 AM, Jin Guojie wrote:
> > 32-bit condition functions(like brcond_i32) should only
> > compare the low half parts of two 64-bit host registers.
> > However, MIPS64 does not have distinct instruction for
> > such operation. The operands should be sign extended
> > to fit the case.
> >
> > Gcc handles 32-bit comparison in the same way, as the
> > following example shows:
> >
> > [a.c]
> > main()
> > {
> > long a = 0xcccccccc;
> > long b = 0xdddddddd;
> > int c = (int)a > (int)b;
> > }
>
> This problem is why opcodes like
>
> OPC_INDEX_extrl_i64_i32
> OPC_INDEX_extrh_i64_i32
> OPC_INDEX_ext_i32_i64
> OPC_INDEX_extu_i32_i64
>
> exist. The intention is to keep 32-bit values in their sign-extended form,
> exactly as the mips hardware manual requires. At which point all 32-bit
> opcodes (ADDIU, SLL, etc) will preserve the 32-bit sign extension property.
It's even stronger than that. It's required for 32-bit opcodes to work
correctly. The manual says:
| If GPR rs does not contain a sign-extended 32-bit value (bits 63..31
| equal), then the result of the operation is UNPREDICTABLE.
Aurelien
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
address@hidden http://www.aurel32.net
- [Qemu-devel] [PATCH v3 02/11] tcg-mips: Add mips64 opcodes, (continued)
- [Qemu-devel] [PATCH v3 02/11] tcg-mips: Add mips64 opcodes, Jin Guojie, 2016/11/24
- [Qemu-devel] [PATCH v3 03/11] tcg-mips: Support 64-bit opcodes, Jin Guojie, 2016/11/24
- [Qemu-devel] [PATCH v3 04/11] tcg-mips: Add bswap32u and bswap64, Jin Guojie, 2016/11/24
- [Qemu-devel] [PATCH v3 05/11] tcg-mips: Adjust move functions for mips64, Jin Guojie, 2016/11/24
- [Qemu-devel] [PATCH v3 06/11] tcg-mips: Adjust load/store functions for mips64, Jin Guojie, 2016/11/24
- [Qemu-devel] [PATCH v3 08/11] tcg-mips: Add tcg unwind info, Jin Guojie, 2016/11/24
- [Qemu-devel] [PATCH v3 09/11] tcg-mips: Adjust calling conventions for mips64, Jin Guojie, 2016/11/24
- [Qemu-devel] [PATCH v3 07/11] tcg-mips: Adjust prologue for mips64, Jin Guojie, 2016/11/24
- [Qemu-devel] [PATCH v3 11/11] tcg-mips: Adjust condition functions for mips64, Jin Guojie, 2016/11/24
- [Qemu-devel] [PATCH v3 10/11] tcg-mips: Adjust qemu_ld/st for mips64, Jin Guojie, 2016/11/24
- Re: [Qemu-devel] [PATCH v3 00/11] tcg mips64 and mips r6 improvements, Aurelien Jarno, 2016/11/25
- Re: [Qemu-devel] [PATCH v3 00/11] tcg mips64 and mips r6 improvements, Aurelien Jarno, 2016/11/30