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[Qemu-devel] [PULL 12/15] target/sh4: implement tas.b using atomic helpe
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PULL 12/15] target/sh4: implement tas.b using atomic helper |
Date: |
Sat, 13 May 2017 11:32:45 +0200 |
We only emulate UP SH4, however as the tas.b instruction is used in the GNU
libc, this improve linux-user emulation.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
target/sh4/translate.c | 19 +++++++------------
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index d61b176a7d..baed19bdac 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -1634,19 +1634,14 @@ static void _decode_opc(DisasContext * ctx)
tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 16);
return;
case 0x401b: /* tas.b @Rn */
- {
- TCGv addr, val;
- addr = tcg_temp_local_new();
- tcg_gen_mov_i32(addr, REG(B11_8));
- val = tcg_temp_local_new();
- tcg_gen_qemu_ld_i32(val, addr, ctx->memidx, MO_UB);
+ {
+ TCGv val = tcg_const_i32(0x80);
+ tcg_gen_atomic_fetch_or_i32(val, REG(B11_8), val,
+ ctx->memidx, MO_UB);
tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_sr_t, val, 0);
- tcg_gen_ori_i32(val, val, 0x80);
- tcg_gen_qemu_st_i32(val, addr, ctx->memidx, MO_UB);
- tcg_temp_free(val);
- tcg_temp_free(addr);
- }
- return;
+ tcg_temp_free(val);
+ }
+ return;
case 0xf00d: /* fsts FPUL,FRn - FPSCR: Nothing */
CHECK_FPU_ENABLED
tcg_gen_mov_i32(cpu_fregs[FREG(B11_8)], cpu_fpul);
--
2.11.0
- [Qemu-devel] [PULL 00/15] Queued target/sh4 patches, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 13/15] target/sh4: movua.l is an SH4-A only instruction, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 12/15] target/sh4: implement tas.b using atomic helper,
Aurelien Jarno <=
- [Qemu-devel] [PULL 05/15] target/sh4: fix BS_STOP exit, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 03/15] target/sh4: do not include DELAY_SLOT_TRUE in the TB state, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 15/15] target/sh4: use cpu_loop_exit_restore, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 08/15] target/sh4: fold ctx->bstate = BS_BRANCH into gen_conditional_jump, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 01/15] target/sh4: split ctx->flags into ctx->tbflags and ctx->envflags, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 11/15] target/sh4: generate fences for SH4, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 09/15] target/sh4: optimize gen_store_fpr64, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 10/15] target/sh4: optimize gen_write_sr using extract op, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 06/15] target/sh4: fix BS_EXCP exit, Aurelien Jarno, 2017/05/13
- [Qemu-devel] [PULL 14/15] target/sh4: trap unaligned accesses, Aurelien Jarno, 2017/05/13