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[Qemu-devel] [PATCH v12 09/27] target/i386: [tcg] Port to translate_insn
From: |
Lluís Vilanova |
Subject: |
[Qemu-devel] [PATCH v12 09/27] target/i386: [tcg] Port to translate_insn |
Date: |
Fri, 7 Jul 2017 14:17:11 +0200 |
User-agent: |
StGit/0.17.1-dirty |
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
---
target/i386/translate.c | 72 +++++++++++++++++++++++++++++++----------------
1 file changed, 48 insertions(+), 24 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index d39e65e5b0..18447b88b2 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -4419,15 +4419,17 @@ static void gen_sse(CPUX86State *env, DisasContext *s,
int b,
/* convert one instruction. s->base.is_jmp is set if the translation must
be stopped. Return the next pc value */
-static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
- target_ulong pc_start)
+static target_ulong disas_insn(DisasContextBase *dcbase, CPUState *cpu)
{
+ DisasContext *s = container_of(dcbase, DisasContext, base);
+ CPUX86State *env = cpu->env_ptr;
int b, prefixes;
int shift;
TCGMemOp ot, aflag, dflag;
int modrm, reg, rm, mod, op, opreg, val;
target_ulong next_eip, tval;
int rex_w, rex_r;
+ target_ulong pc_start = s->base.pc_next;
s->pc_start = s->pc = pc_start;
prefixes = 0;
@@ -8474,10 +8476,51 @@ static BreakpointCheckType i386_tr_breakpoint_check(
}
}
+static target_ulong i386_tr_translate_insn(DisasContextBase *dcbase,
+ CPUState *cpu)
+{
+ DisasContext *dc = container_of(dcbase, DisasContext, base);
+ target_ulong pc_next = disas_insn(&dc->base, cpu);
+
+ if (dc->base.is_jmp) {
+ return pc_next;
+ }
+
+ if (dc->tf || (dc->base.tb->flags & HF_INHIBIT_IRQ_MASK)) {
+ /* if single step mode, we generate only one instruction and
+ generate an exception */
+ /* if irq were inhibited with HF_INHIBIT_IRQ_MASK, we clear
+ the flag and abort the translation to give the irqs a
+ chance to happen */
+ gen_jmp_im(pc_next - dc->cs_base);
+ gen_eob(dc);
+ dc->base.is_jmp = DISAS_TOO_MANY;
+ } else if ((dc->base.tb->cflags & CF_USE_ICOUNT)
+ && ((dc->base.pc_next & TARGET_PAGE_MASK)
+ != ((dc->base.pc_next + TARGET_MAX_INSN_SIZE - 1)
+ & TARGET_PAGE_MASK)
+ || (dc->base.pc_next & ~TARGET_PAGE_MASK) == 0)) {
+ /* Do not cross the boundary of the pages in icount mode,
+ it can cause an exception. Do it only when boundary is
+ crossed by the first instruction in the block.
+ If current instruction already crossed the bound - it's ok,
+ because an exception hasn't stopped this code.
+ */
+ gen_jmp_im(pc_next - dc->cs_base);
+ gen_eob(dc);
+ dc->base.is_jmp = DISAS_TOO_MANY;
+ } else if ((pc_next - dc->base.pc_first) >= (TARGET_PAGE_SIZE - 32)) {
+ gen_jmp_im(pc_next - dc->cs_base);
+ gen_eob(dc);
+ dc->base.is_jmp = DISAS_TOO_MANY;
+ }
+
+ return pc_next;
+}
+
/* generate intermediate code for basic block 'tb'. */
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
{
- CPUX86State *env = cs->env_ptr;
DisasContext dc1, *dc = &dc1;
int num_insns;
int max_insns;
@@ -8537,39 +8580,20 @@ void gen_intermediate_code(CPUState *cs,
TranslationBlock *tb)
gen_io_start();
}
- dc->base.pc_next = disas_insn(env, dc, dc->base.pc_next);
+ dc->base.pc_next = i386_tr_translate_insn(&dc->base, cs);
/* stop translation if indicated */
if (dc->base.is_jmp) {
break;
}
/* if single step mode, we generate only one instruction and
generate an exception */
- /* if irq were inhibited with HF_INHIBIT_IRQ_MASK, we clear
- the flag and abort the translation to give the irqs a
- change to be happen */
- if (dc->tf || dc->base.singlestep_enabled ||
- (dc->base.tb->flags & HF_INHIBIT_IRQ_MASK)) {
- gen_jmp_im(dc->base.pc_next - dc->cs_base);
- gen_eob(dc);
- break;
- }
- /* Do not cross the boundary of the pages in icount mode,
- it can cause an exception. Do it only when boundary is
- crossed by the first instruction in the block.
- If current instruction already crossed the bound - it's ok,
- because an exception hasn't stopped this code.
- */
- if ((tb->cflags & CF_USE_ICOUNT)
- && ((dc->base.pc_next & TARGET_PAGE_MASK)
- != ((dc->base.pc_next + TARGET_MAX_INSN_SIZE - 1) &
TARGET_PAGE_MASK)
- || (dc->base.pc_next & ~TARGET_PAGE_MASK) == 0)) {
+ if (dc->base.singlestep_enabled) {
gen_jmp_im(dc->base.pc_next - dc->cs_base);
gen_eob(dc);
break;
}
/* if too long translation, stop generation too */
if (tcg_op_buf_full() ||
- (dc->base.pc_next - dc->base.pc_first) >= (TARGET_PAGE_SIZE - 32)
||
num_insns >= max_insns) {
gen_jmp_im(dc->base.pc_next - dc->cs_base);
gen_eob(dc);
- Re: [Qemu-devel] [PATCH v12 04/27] target: [tcg] Add generic translation framework, (continued)
[Qemu-devel] [PATCH v12 05/27] target/i386: [tcg] Port to DisasContextBase, Lluís Vilanova, 2017/07/07
[Qemu-devel] [PATCH v12 06/27] target/i386: [tcg] Port to init_disas_context, Lluís Vilanova, 2017/07/07
[Qemu-devel] [PATCH v12 07/27] target/i386: [tcg] Port to insn_start, Lluís Vilanova, 2017/07/07
[Qemu-devel] [PATCH v12 08/27] target/i386: [tcg] Port to breakpoint_check, Lluís Vilanova, 2017/07/07
[Qemu-devel] [PATCH v12 09/27] target/i386: [tcg] Port to translate_insn,
Lluís Vilanova <=
[Qemu-devel] [PATCH v12 10/27] target/i386: [tcg] Port to tb_stop, Lluís Vilanova, 2017/07/07
[Qemu-devel] [PATCH v12 11/27] target/i386: [tcg] Port to disas_log, Lluís Vilanova, 2017/07/07
[Qemu-devel] [PATCH v12 12/27] target/i386: [tcg] Port to generic translation framework, Lluís Vilanova, 2017/07/07
[Qemu-devel] [PATCH v12 13/27] target/arm: [tcg] Port to DisasContextBase, Lluís Vilanova, 2017/07/07
[Qemu-devel] [PATCH v12 14/27] target/arm: [tcg] Port to init_disas_context, Lluís Vilanova, 2017/07/07
[Qemu-devel] [PATCH v12 15/27] target/arm: [tcg, a64] Port to init_disas_context, Lluís Vilanova, 2017/07/07
[Qemu-devel] [PATCH v12 16/27] target/arm: [tcg] Port to tb_start, Lluís Vilanova, 2017/07/07