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[Qemu-devel] [PULL 02/14] tcg: Add tcg target default memory ordering
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 02/14] tcg: Add tcg target default memory ordering |
Date: |
Wed, 6 Sep 2017 07:49:28 -0700 |
From: Pranith Kumar <address@hidden>
Signed-off-by: Pranith Kumar <address@hidden>
Message-Id: <address@hidden>
[rth: Dropped ia64 hunk]
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/aarch64/tcg-target.h | 2 ++
tcg/arm/tcg-target.h | 2 ++
tcg/mips/tcg-target.h | 2 ++
tcg/ppc/tcg-target.h | 2 ++
tcg/s390/tcg-target.h | 2 ++
tcg/sparc/tcg-target.h | 2 ++
6 files changed, 12 insertions(+)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 55a46ac825..b41a248bee 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -117,4 +117,6 @@ static inline void flush_icache_range(uintptr_t start,
uintptr_t stop)
__builtin___clear_cache((char *)start, (char *)stop);
}
+#define TCG_TARGET_DEFAULT_MO (0)
+
#endif /* AARCH64_TCG_TARGET_H */
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 5ef1086710..a38be15a39 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -134,4 +134,6 @@ static inline void flush_icache_range(uintptr_t start,
uintptr_t stop)
__builtin___clear_cache((char *) start, (char *) stop);
}
+#define TCG_TARGET_DEFAULT_MO (0)
+
#endif
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index d75cb63ed3..e9558d15bc 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -206,4 +206,6 @@ static inline void flush_icache_range(uintptr_t start,
uintptr_t stop)
cacheflush ((void *)start, stop-start, ICACHE);
}
+#define TCG_TARGET_DEFAULT_MO (0)
+
#endif
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index 5f4a40a5b4..5a092b038a 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -125,4 +125,6 @@ extern bool have_isa_3_00;
void flush_icache_range(uintptr_t start, uintptr_t stop);
+#define TCG_TARGET_DEFAULT_MO (0)
+
#endif
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index 957f0c0afe..dc0e59193c 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s390/tcg-target.h
@@ -133,6 +133,8 @@ extern uint64_t s390_facilities;
#define TCG_TARGET_EXTEND_ARGS 1
+#define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
+
enum {
TCG_AREG0 = TCG_REG_R10,
};
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 854a0afd70..4515c9ab48 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -162,6 +162,8 @@ extern bool use_vis3_instructions;
#define TCG_AREG0 TCG_REG_I0
+#define TCG_TARGET_DEFAULT_MO (0)
+
static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
uintptr_t p;
--
2.13.5
- [Qemu-devel] [PULL 00/14] TCG misc queued patches, Richard Henderson, 2017/09/06
- [Qemu-devel] [PULL 02/14] tcg: Add tcg target default memory ordering,
Richard Henderson <=
- [Qemu-devel] [PULL 03/14] tcg: Implement implicit ordering semantics, Richard Henderson, 2017/09/06
- [Qemu-devel] [PULL 04/14] disas/i386: Fix disassembly of two-byte vex prefixes, Richard Henderson, 2017/09/06
- [Qemu-devel] [PULL 05/14] disas/i386: Add disassembly of vex.0f38.f5, Richard Henderson, 2017/09/06
- [Qemu-devel] [PULL 08/14] tcg/s390: Merge cmpi facilities check to tcg_target_op_def, Richard Henderson, 2017/09/06
- [Qemu-devel] [PULL 07/14] tcg/s390: Fully convert tcg_target_op_def, Richard Henderson, 2017/09/06
- [Qemu-devel] [PULL 09/14] tcg/s390: Merge muli facilities check to tcg_target_op_def, Richard Henderson, 2017/09/06
- [Qemu-devel] [PULL 06/14] disas/i386: Add disassembly of rorx, Richard Henderson, 2017/09/06
- [Qemu-devel] [PULL 11/14] tcg/s390: Merge ori+xori facilities check to tcg_target_op_def, Richard Henderson, 2017/09/06
- [Qemu-devel] [PULL 13/14] tcg/s390: Use load-on-condition-2 facility, Richard Henderson, 2017/09/06
- [Qemu-devel] [PULL 10/14] tcg/s390: Merge add2i facilities check to tcg_target_op_def, Richard Henderson, 2017/09/06