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Re: [Qemu-devel] [PATCH 2/7] aspeed_sdmc: Fix saved values
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-devel] [PATCH 2/7] aspeed_sdmc: Fix saved values |
Date: |
Tue, 7 Aug 2018 11:55:01 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 |
On 08/07/2018 09:57 AM, Joel Stanley wrote:
> This fixes the intended protection of read-only values in the
> configuration register. They were being always set to zero by mistake.
yes :/
> The read-only fields depend on the configured memory size of the system,
> so they cannot be fixed at compile time. The most straight forward
> option was to store them in the state structure.
We could also use an array of init values for registers, like SCU does, but
this is fine for now.
> Signed-off-by: Joel Stanley <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Thanks,
C.
> ---
> hw/misc/aspeed_sdmc.c | 27 ++++++++-------------------
> include/hw/misc/aspeed_sdmc.h | 1 +
> 2 files changed, 9 insertions(+), 19 deletions(-)
>
> diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
> index 0df008e52a18..24fd4aee2d82 100644
> --- a/hw/misc/aspeed_sdmc.c
> +++ b/hw/misc/aspeed_sdmc.c
> @@ -126,10 +126,12 @@ static void aspeed_sdmc_write(void *opaque, hwaddr
> addr, uint64_t data,
> case AST2400_A0_SILICON_REV:
> case AST2400_A1_SILICON_REV:
> data &= ~ASPEED_SDMC_READONLY_MASK;
> + data |= s->fixed_conf;
> break;
> case AST2500_A0_SILICON_REV:
> case AST2500_A1_SILICON_REV:
> data &= ~ASPEED_SDMC_AST2500_READONLY_MASK;
> + data |= s->fixed_conf;
> break;
> default:
> g_assert_not_reached();
> @@ -198,25 +200,7 @@ static void aspeed_sdmc_reset(DeviceState *dev)
> memset(s->regs, 0, sizeof(s->regs));
>
> /* Set ram size bit and defaults values */
> - switch (s->silicon_rev) {
> - case AST2400_A0_SILICON_REV:
> - case AST2400_A1_SILICON_REV:
> - s->regs[R_CONF] |=
> - ASPEED_SDMC_VGA_COMPAT |
> - ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
> - break;
> -
> - case AST2500_A0_SILICON_REV:
> - case AST2500_A1_SILICON_REV:
> - s->regs[R_CONF] |=
> - ASPEED_SDMC_HW_VERSION(1) |
> - ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) |
> - ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
> - break;
> -
> - default:
> - g_assert_not_reached();
> - }
> + s->regs[R_CONF] = s->fixed_conf;
> }
>
> static void aspeed_sdmc_realize(DeviceState *dev, Error **errp)
> @@ -234,10 +218,15 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error
> **errp)
> case AST2400_A0_SILICON_REV:
> case AST2400_A1_SILICON_REV:
> s->ram_bits = ast2400_rambits(s);
> + s->fixed_conf = ASPEED_SDMC_VGA_COMPAT |
> + ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
> break;
> case AST2500_A0_SILICON_REV:
> case AST2500_A1_SILICON_REV:
> s->ram_bits = ast2500_rambits(s);
> + s->fixed_conf = ASPEED_SDMC_HW_VERSION(1) |
> + ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) |
> + ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
> break;
> default:
> g_assert_not_reached();
> diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h
> index 682f0f5d56dc..e079c66a7d73 100644
> --- a/include/hw/misc/aspeed_sdmc.h
> +++ b/include/hw/misc/aspeed_sdmc.h
> @@ -27,6 +27,7 @@ typedef struct AspeedSDMCState {
> uint32_t silicon_rev;
> uint32_t ram_bits;
> uint64_t ram_size;
> + uint32_t fixed_conf;
>
> } AspeedSDMCState;
>
>
- [Qemu-devel] [PATCH 0/7] arm: aspeed: Extend SDRAM controller, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 1/7] aspeed_sdmc: Extend number of valid registers, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 2/7] aspeed_sdmc: Fix saved values, Joel Stanley, 2018/08/07
- Re: [Qemu-devel] [PATCH 2/7] aspeed_sdmc: Fix saved values,
Cédric Le Goater <=
- [Qemu-devel] [PATCH 3/7] aspeed_sdmc: Set 'cache initial sequence' always true, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 4/7] aspeed_sdmc: Init status alwlays idle, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 5/7] aspeed_sdmc: Handle ECC training, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 6/7] aspeed: add a max_ram_size property to the memory controller, Joel Stanley, 2018/08/07