[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 15/45] vmstate.h: Provide VMSTATE_UINT16_SUB_ARRAY
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 15/45] vmstate.h: Provide VMSTATE_UINT16_SUB_ARRAY |
Date: |
Tue, 14 Aug 2018 19:17:45 +0100 |
From: Luc Michel <address@hidden>
Provide a VMSTATE_UINT16_SUB_ARRAY macro to save a uint16_t sub-array in
a VMState.
Signed-off-by: Luc Michel <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
include/migration/vmstate.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h
index 42b946ce902..2b501d04669 100644
--- a/include/migration/vmstate.h
+++ b/include/migration/vmstate.h
@@ -923,6 +923,9 @@ extern const VMStateInfo vmstate_info_qtailq;
#define VMSTATE_UINT16_ARRAY(_f, _s, _n) \
VMSTATE_UINT16_ARRAY_V(_f, _s, _n, 0)
+#define VMSTATE_UINT16_SUB_ARRAY(_f, _s, _start, _num) \
+ VMSTATE_SUB_ARRAY(_f, _s, _start, _num, 0, vmstate_info_uint16, uint16_t)
+
#define VMSTATE_UINT16_2DARRAY(_f, _s, _n1, _n2) \
VMSTATE_UINT16_2DARRAY_V(_f, _s, _n1, _n2, 0)
--
2.18.0
- [Qemu-devel] [PULL 04/45] nvic: Change NVIC to support ARMv6-M, (continued)
- [Qemu-devel] [PULL 04/45] nvic: Change NVIC to support ARMv6-M, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 06/45] accel/tcg: Handle get_page_addr_code() returning -1 in hashtable lookups, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 08/45] accel/tcg: tb_gen_code(): Create single-insn TB for execution from non-RAM, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 03/45] arm: Add ARMv6-M programmer's model support, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 01/45] target/arm: Forbid unprivileged mode for M Baseline, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 14/45] intc/arm_gic: Remove some dead code and put some functions static, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 07/45] accel/tcg: Handle get_page_addr_code() returning -1 in tb_check_watchpoint(), Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 11/45] accel/tcg: Check whether TLB entry is RAM consistently with how we set it up, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 16/45] intc/arm_gic: Add the virtualization extensions to the GIC state, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 28/45] intc/arm_gic: Implement maintenance interrupt generation, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 15/45] vmstate.h: Provide VMSTATE_UINT16_SUB_ARRAY,
Peter Maydell <=
- [Qemu-devel] [PULL 35/45] target/arm: Honour HCR_EL2.TGE when raising synchronous exceptions, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 36/45] target/arm: Provide accessor functions for HCR_EL2.{IMO, FMO, AMO}, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 10/45] target/arm: Allow execution from small regions, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 12/45] intc/arm_gic: Refactor operations on the distributor, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 13/45] intc/arm_gic: Implement GICD_ISACTIVERn and GICD_ICACTIVERn registers, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 22/45] intc/arm_gic: Implement virtualization extensions in gic_acknowledge_irq, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 19/45] intc/arm_gic: Refactor secure/ns access check in the CPU interface, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 24/45] intc/arm_gic: Implement virtualization extensions in gic_cpu_(read|write), Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 31/45] arm/virt: Add support for GICv2 virtualization extensions, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 32/45] arm: Fix return code of arm_load_elf, Peter Maydell, 2018/08/14