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Re: [Qemu-devel] [PULL 0/8] x86 queue, 2018-08-16
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Re: [Qemu-devel] [PULL 0/8] x86 queue, 2018-08-16 |
Date: |
Fri, 17 Aug 2018 16:33:56 -0700 (PDT) |
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PULL 0/8] x86 queue, 2018-08-16
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
e2494d9f93 i386: Disable TOPOEXT by default on "-cpu host"
b3fa832cb0 target-i386: adds PV_SEND_IPI CPUID feature bit
9c4a861193 i386: Add new CPU model Icelake-{Server, Client}
5c0a3ee54c i386: Add CPUID bit for WBNOINVD
82a1edf25b i386: Add CPUID bit for PCONFIG
d78f2e0834 i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR
eb4ae4c37a i386: Add new MSR indices for IA32_PRED_CMD and
IA32_ARCH_CAPABILITIES
8acd5d773a docs: add guidance on configuring CPU models for x86
=== OUTPUT BEGIN ===
Checking PATCH 1/8: docs: add guidance on configuring CPU models for x86...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#82:
new file mode 100644
total: 0 errors, 1 warnings, 546 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 2/8: i386: Add new MSR indices for IA32_PRED_CMD and
IA32_ARCH_CAPABILITIES...
Checking PATCH 3/8: i386: Add CPUID bit and feature words for
IA32_ARCH_CAPABILITIES MSR...
Checking PATCH 4/8: i386: Add CPUID bit for PCONFIG...
Checking PATCH 5/8: i386: Add CPUID bit for WBNOINVD...
ERROR: line over 90 characters
#36: FILE: target/i386/cpu.h:698:
+
do not invalidate cache */
total: 1 errors, 0 warnings, 16 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 6/8: i386: Add new CPU model Icelake-{Server, Client}...
Checking PATCH 7/8: target-i386: adds PV_SEND_IPI CPUID feature bit...
Checking PATCH 8/8: i386: Disable TOPOEXT by default on "-cpu host"...
=== OUTPUT END ===
Test command exited with code: 1
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden
- [Qemu-devel] [PULL 2/8] i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES, (continued)
- [Qemu-devel] [PULL 2/8] i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES, Eduardo Habkost, 2018/08/16
- [Qemu-devel] [PULL 3/8] i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR, Eduardo Habkost, 2018/08/16
- [Qemu-devel] [PULL 1/8] docs: add guidance on configuring CPU models for x86, Eduardo Habkost, 2018/08/16
- [Qemu-devel] [PULL 4/8] i386: Add CPUID bit for PCONFIG, Eduardo Habkost, 2018/08/16
- [Qemu-devel] [PULL 5/8] i386: Add CPUID bit for WBNOINVD, Eduardo Habkost, 2018/08/16
- [Qemu-devel] [PULL 7/8] target-i386: adds PV_SEND_IPI CPUID feature bit, Eduardo Habkost, 2018/08/16
- [Qemu-devel] [PULL 6/8] i386: Add new CPU model Icelake-{Server, Client}, Eduardo Habkost, 2018/08/16
- [Qemu-devel] [PULL 8/8] i386: Disable TOPOEXT by default on "-cpu host", Eduardo Habkost, 2018/08/16
- Re: [Qemu-devel] [PULL 0/8] x86 queue, 2018-08-16, Peter Maydell, 2018/08/17
- Re: [Qemu-devel] [PULL 0/8] x86 queue, 2018-08-16,
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