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[Qemu-devel] [PULL v4 45/46] mips_malta: Fix semihosting argument passin
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL v4 45/46] mips_malta: Fix semihosting argument passing for nanoMIPS bare metal |
Date: |
Thu, 23 Aug 2018 15:34:35 +0200 |
From: Stefan Markovic <address@hidden>
Fix passing argument for nanoMIPS bare metal related to the
semihosting regime.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
---
hw/mips/mips_malta.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index f261dd6..40041d5 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -630,8 +630,14 @@ static void write_bootloader_nanomips(uint8_t *base,
int64_t run_addr,
/* nop */
/* to_here: */
- stw_p(p++, 0x0080); stw_p(p++, 0x0002);
+ if (semihosting_get_argc()) {
+ /* Preserve a0 content as arguments have been passed */
+ stw_p(p++, 0x8000); stw_p(p++, 0xc000);
+ /* nop */
+ } else {
+ stw_p(p++, 0x0080); stw_p(p++, 0x0002);
/* li a0,2 */
+ }
stw_p(p++, 0xe3a0 | NM_HI1(ENVP_ADDR - 64));
--
2.7.4
- [Qemu-devel] [PULL v4 05/46] target/mips: Add placeholder and invocation of decode_nanomips_opc(), (continued)
- [Qemu-devel] [PULL v4 05/46] target/mips: Add placeholder and invocation of decode_nanomips_opc(), Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 08/46] target/mips: Add emulation of nanoMIPS 16-bit branch instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 27/46] target/mips: Fix pre-nanoMIPS MT ASE instructions availability control, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 10/46] target/mips: Add emulation of nanoMIPS 16-bit misc instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 14/46] target/mips: Add emulation of some common nanoMIPS 32-bit instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 20/46] target/mips: Add emulation of misc nanoMIPS instructions (p_lsx), Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 33/46] target/mips: Add emulation of DSP ASE for nanoMIPS - part 5, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 41/46] elf: On elf loading, treat both EM_MIPS and EM_NANOMIPS as legal for MIPS, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 38/46] target/mips: Fix ERET/ERETNC behavior related to ADEL exception, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 42/46] elf: Don't check FCR31_NAN2008 bit for nanoMIPS, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 45/46] mips_malta: Fix semihosting argument passing for nanoMIPS bare metal,
Aleksandar Markovic <=
- [Qemu-devel] [PULL v4 46/46] target/mips: Add definition of nanoMIPS I7200 CPU, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 43/46] mips_malta: Add basic nanoMIPS boot code for Malta board, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 26/46] target/mips: Add emulation of nanoMIPS 32-bit branch instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 29/46] target/mips: Add emulation of DSP ASE for nanoMIPS - part 1, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 34/46] target/mips: Add emulation of DSP ASE for nanoMIPS - part 6, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 22/46] target/mips: Implement emulation of nanoMIPS EXTW instruction, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 25/46] target/mips: Implement emulation of nanoMIPS LLWP/SCWP pair, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 24/46] target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 30/46] target/mips: Add emulation of DSP ASE for nanoMIPS - part 2, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v4 37/46] target/mips: Add updating BadInstr and BadInstrX for nanoMIPS, Aleksandar Markovic, 2018/08/23