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[Qemu-devel] [PATCH v4 5/8] target/mips: R5900 DMULT[U], DDIV[U], LL, SC


From: Fredrik Noring
Subject: [Qemu-devel] [PATCH v4 5/8] target/mips: R5900 DMULT[U], DDIV[U], LL, SC, LLD and SCD are user only
Date: Sun, 16 Sep 2018 17:13:03 +0200

These MIPS III instructions are unavailable and therefore trapped and
emulated by the Linux kernel.

Signed-off-by: Fredrik Noring <address@hidden>
---
 target/mips/translate.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 77d678353e..327e96307b 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -22458,6 +22458,7 @@ static void decode_opc_special_legacy(CPUMIPSState 
*env, DisasContext *ctx)
     case OPC_DMULTU:
     case OPC_DDIV:
     case OPC_DDIVU:
+        check_insn_opc_user_only(ctx, INSN_R5900);
         check_insn(ctx, ISA_MIPS3);
         check_mips_64(ctx);
         gen_muldiv(ctx, op1, 0, rs, rt);
@@ -24962,6 +24963,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext 
*ctx)
          break;
     case OPC_LL: /* Load and stores */
         check_insn(ctx, ISA_MIPS2);
+        check_insn_opc_user_only(ctx, INSN_R5900);
         /* Fallthrough */
     case OPC_LWL:
     case OPC_LWR:
@@ -24987,6 +24989,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext 
*ctx)
     case OPC_SC:
         check_insn(ctx, ISA_MIPS2);
          check_insn_opc_removed(ctx, ISA_MIPS32R6);
+        check_insn_opc_user_only(ctx, INSN_R5900);
          gen_st_cond(ctx, op, rt, rs, imm);
          break;
     case OPC_CACHE:
@@ -25253,9 +25256,11 @@ static void decode_opc(CPUMIPSState *env, DisasContext 
*ctx)
 
 #if defined(TARGET_MIPS64)
     /* MIPS64 opcodes */
+    case OPC_LLD:
+        check_insn_opc_user_only(ctx, INSN_R5900);
+        /* fall through */
     case OPC_LDL:
     case OPC_LDR:
-    case OPC_LLD:
         check_insn_opc_removed(ctx, ISA_MIPS32R6);
         /* fall through */
     case OPC_LWU:
@@ -25275,6 +25280,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext 
*ctx)
         break;
     case OPC_SCD:
         check_insn_opc_removed(ctx, ISA_MIPS32R6);
+        check_insn_opc_user_only(ctx, INSN_R5900);
         check_insn(ctx, ISA_MIPS3);
         check_mips_64(ctx);
         gen_st_cond(ctx, op, rt, rs, imm);
-- 
2.16.4




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