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Re: [Qemu-devel] [PULL 00/34] MIPS queue for October 2018 - part 2
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL 00/34] MIPS queue for October 2018 - part 2 |
Date: |
Tue, 23 Oct 2018 20:49:15 +0100 |
On 22 October 2018 at 13:57, Aleksandar Markovic
<address@hidden> wrote:
> From: Aleksandar Markovic <address@hidden>
>
> The following changes since commit b312532fd03413d0e6ae6767ec793a3e30f487b8:
>
> Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into
> staging (2018-10-19 19:01:07 +0100)
>
> are available in the git repository at:
>
> https://github.com/AMarkovic/qemu tags/mips-queue-oct-2018-part-2
>
> for you to fetch changes up to 2ec219776c633df9e43c5fa1557f70ee4f735f9d:
>
> target/mips: Fix decoding of ALIGN and DALIGN instructions (2018-10-22
> 14:41:47 +0200)
>
> ----------------------------------------------------------------
> MIPS queue for October 2018 - part 2
>
> Limited support for R5900 ISA, MMI ASE, and two misc fixes.
>
> ----------------------------------------------------------------
Hi: I get compile errors on 32-bit hosts:
/home/petmay01/qemu-for-merges/disas/mips.c:615:35: error: large
integer implicitly truncated to unsigned type [-Werror=overflow]
#define INSN_5900 0x100000000
^
/home/petmay01/qemu-for-merges/disas/mips.c:1200:17: note: in
expansion of macro 'INSN_5900'
#define EE INSN_5900 /* Emotion Engine */
^
/home/petmay01/qemu-for-merges/disas/mips.c:2326:73: note: in
expansion of macro 'EE'
{"div1", "z,s,t", 0x7000001a, 0xfc00ffff, RD_s | RD_t | WR_HILO, 0, EE },
^
(and repeats on other similar uses).
This is because this line is an initializer for "struct mips_opcode",
and the final field is "unsigned long membership", which may be only
32 bits wide, but you're trying to put a number in that's too big for that.
thanks
-- PMM
- [Qemu-devel] [PULL 15/34] target/mips: Placeholder for R5900 MMI2 instruction subclass, (continued)
- [Qemu-devel] [PULL 15/34] target/mips: Placeholder for R5900 MMI2 instruction subclass, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 26/34] tests/tcg/mips: Test R5900 three-operand MULTU1, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 30/34] tests/tcg/mips: Test R5900 DIVU1, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 25/34] tests/tcg/mips: Test R5900 three-operand MULT1, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 29/34] tests/tcg/mips: Test R5900 DIV1, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 31/34] target/mips: Define the R5900 CPU, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 27/34] tests/tcg/mips: Test R5900 MFLO1 and MFHI1, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 32/34] linux-user/mips: Recognise the R5900 CPU model, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 33/34] target/mips: Fix the title of translate.c, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 34/34] target/mips: Fix decoding of ALIGN and DALIGN instructions, Aleksandar Markovic, 2018/10/22
- Re: [Qemu-devel] [PULL 00/34] MIPS queue for October 2018 - part 2,
Peter Maydell <=
- Re: [Qemu-devel] [PATCH v8 00/38] target/mips: Limited support for the R5900, Fredrik Noring, 2018/10/23
- Re: [Qemu-devel] [PATCH v8 00/38] target/mips: Limited support for the R5900, Richard Henderson, 2018/10/24
- Re: [Qemu-devel] [PATCH v8 00/38] target/mips: Limited support for the R5900, Fredrik Noring, 2018/10/25
- Re: [Qemu-devel] [PATCH v8 00/38] target/mips: Limited support for the R5900, Maciej W. Rozycki, 2018/10/25
- Re: [Qemu-devel] [PATCH v8 00/38] target/mips: Limited support for the R5900, Fredrik Noring, 2018/10/25
- Re: [Qemu-devel] [PATCH v8 00/38] target/mips: Limited support for the R5900, Richard Henderson, 2018/10/26
- Re: [Qemu-devel] [PATCH v8 00/38] target/mips: Limited support for the R5900, Maciej W. Rozycki, 2018/10/26