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[Qemu-devel] [PATCH 01/11] target/mips: Rename ASE_MMI to ASE_TOSHIBA_MM
From: |
Fredrik Noring |
Subject: |
[Qemu-devel] [PATCH 01/11] target/mips: Rename ASE_MMI to ASE_TOSHIBA_MMI, with Toshiba namespace |
Date: |
Thu, 25 Oct 2018 19:30:11 +0200 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
Several vendors have multimedia instruction (MMI) sets and other
extensions of various kinds. ASE vendor namespaces make it clear these
are not generic architectural features and also avoid name clashes.
Reported-by: Maciej W. Rozycki <address@hidden>
Signed-off-by: Fredrik Noring <address@hidden>
---
target/mips/mips-defs.h | 2 +-
target/mips/translate.c | 3 ++-
target/mips/translate_init.inc.c | 2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index 5177618615..30b07e0bde 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -68,7 +68,7 @@
/*
* bits 56-63: vendor-specific ASEs
*/
-#define ASE_MMI 0x0100000000000000ULL
+#define ASE_TOSHIBA_MMI 0x0100000000000000ULL
/* MIPS CPU defines. */
#define CPU_MIPS1 (ISA_MIPS1)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index c44a751be9..8547a6e6f6 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -26092,7 +26092,8 @@ static void decode_opc(CPUMIPSState *env, DisasContext
*ctx)
decode_opc_special(env, ctx);
break;
case OPC_SPECIAL2:
- if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI)) {
+ if ((ctx->insn_flags & INSN_R5900) &&
+ (ctx->insn_flags & ASE_TOSHIBA_MMI)) {
decode_tx79_mmi(env, ctx);
} else {
decode_opc_special2_legacy(env, ctx);
diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.inc.c
index 85da4a269c..5cd968366b 100644
--- a/target/mips/translate_init.inc.c
+++ b/target/mips/translate_init.inc.c
@@ -466,7 +466,7 @@ const mips_def_t mips_defs[] =
#endif /* !CONFIG_USER_ONLY */
.SEGBITS = 32,
.PABITS = 32,
- .insn_flags = CPU_R5900 | ASE_MMI,
+ .insn_flags = CPU_R5900 | ASE_TOSHIBA_MMI,
.mmu_type = MMU_TYPE_R4000,
},
{
--
2.18.1
- [Qemu-devel] [PATCH 00/11] target/mips: Amend R5900 support, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 01/11] target/mips: Rename ASE_MMI to ASE_TOSHIBA_MMI, with Toshiba namespace,
Fredrik Noring <=
- [Qemu-devel] [PATCH 02/11] target/mips: R5900 LQ and SQ also belong to the Toshiba MMI ASE, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 03/11] target/mips: Support Toshiba specific three-operand MADD and MADDU, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 04/11] target/mips: Support R5900 three-operand MADD1 and MADDU1, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 05/11] tests/tcg/mips: Test R5900 three-operand MADD, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 06/11] tests/tcg/mips: Test R5900 three-operand MADD1, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 07/11] tests/tcg/mips: Test R5900 three-operand MADDU, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 08/11] tests/tcg/mips: Test R5900 three-operand MADDU1, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 09/11] disas/mips: Increase 'member of ISAs' flag holder size, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 10/11] disas/mips: Define R5900 disassembly constants, Fredrik Noring, 2018/10/25