Re: [Qemu-devel] [PATCH 0/2] target/mips: Fix decoding mechanisms of R5900 M{F, T}{HI, LO}1 and DIV[U]1

[Fredrik Noring]

Hi Aleksandar,

> I think the following code would be even better:
> 
>     case OPC_SC:
>         check_insn(ctx, ISA_MIPS2);
>         check_insn_opc_removed(ctx, ISA_MIPS32R6);
>         if (ctx->insn_flags & INSN_R5900) {
>             check_insn_opc_user_only(ctx, INSN_R5900);
>         }
>         gen_st_cond(ctx, op, rt, rs, imm);
>         break;

Done.

> I don't mind. Later on, we can drop the second argument of
> check_insn_opc_user_only() altogether, and the code would expand to the
> minimal and clear:
> 
>         if (ctx->insn_flags & INSN_R5900) {
> #ifndef CONFIG_USER_ONLY
>             generate_exception_end(ctx, EXCP_RI);
> #endif
>         }
> 
> but at this moment this is not a source of concern to me at all.

OK.

> No, no, you don't need to copy 82 lines. First, you can assume that you
> are already in INSN_R5900 case - no need for frequent check_insn()s.
> Further, you can omit everything that is not needed for R5900 (for
> example, entire OPC_MOVCI case).

Yes, of course. I've made some general updates as well, for example
making use of extract32. I will post v2 in a moment.

Fredrik