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Re: [Qemu-ppc] [Qemu-devel] [V4 PATCH 02/22] softfloat: Add float32_to_u
From: |
Peter Maydell |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [V4 PATCH 02/22] softfloat: Add float32_to_uint64() |
Date: |
Thu, 19 Dec 2013 21:31:21 +0000 |
On 18 December 2013 20:19, Tom Musta <address@hidden> wrote:
> This patch adds the float32_to_uint64() routine, which converts a
> 32-bit floating point number to an unsigned 64 bit number.
>
> This contribution can be licensed under either the softfloat-2a or -2b
> license.
>
> V2: Reduced patch to just this single routine per feedback from Peter
> Maydell.
>
> V4: Now passing sign to roundAndPackUint64()
>
> Signed-off-by: Tom Musta <address@hidden>
> ---
> fpu/softfloat.c | 45 +++++++++++++++++++++++++++++++++++++++++++++
> include/fpu/softfloat.h | 1 +
> 2 files changed, 46 insertions(+), 0 deletions(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index ec23908..1ff59d0 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -1558,6 +1558,51 @@ int64 float32_to_int64( float32 a STATUS_PARAM )
>
>
> /*----------------------------------------------------------------------------
> | Returns the result of converting the single-precision floating-point value
> +| `a' to the 64-bit unsigned integer format. The conversion is
> +| performed according to the IEC/IEEE Standard for Binary Floating-Point
> +| Arithmetic---which means in particular that the conversion is rounded
> +| according to the current rounding mode. If `a' is a NaN, the largest
> +| unsigned integer is returned. Otherwise, if the conversion overflows, the
> +| largest unsigned integer is returned. If the 'a' is negative, zero is
> +| returned.
> +*----------------------------------------------------------------------------*/
> +
> +uint64 float32_to_uint64(float32 a STATUS_PARAM)
> +{
> + flag aSign;
> + int_fast16_t aExp, shiftCount;
> + uint32_t aSig;
> + uint64_t aSig64, aSigExtra;
> + a = float32_squash_input_denormal(a STATUS_VAR);
> +
> + aSig = extractFloat32Frac(a);
> + aExp = extractFloat32Exp(a);
> + aSign = extractFloat32Sign(a);
> + if (aSign) {
> + if (aExp) {
> + float_raise(float_flag_invalid STATUS_VAR);
NaNs with the sign bit set will wind up in this case and return 0
rather than largest-unsigned-integer.
Also it seems like this code says "negative inputs return
zero if they're denormal or signal Invalid and return 0
if they're not". Are you sure this does the right thing for
(a) values which are not denormal but are close enough
to zero to round to it and (b) different rounding modes?
> + } else if (aSig) { /* negative denormalized */
> + float_raise(float_flag_inexact STATUS_VAR);
> + }
> + return 0;
> + }
> + shiftCount = 0xBE - aExp;
> + if (aExp) {
> + aSig |= 0x00800000;
> + }
> + if (shiftCount < 0) {
> + float_raise(float_flag_invalid STATUS_VAR);
> + return (int64_t)LIT64(0xFFFFFFFFFFFFFFFF);
> + }
> +
> + aSig64 = aSig;
> + aSig64 <<= 40;
> + shift64ExtraRightJamming(aSig64, 0, shiftCount, &aSig64, &aSigExtra);
> + return roundAndPackUint64(aSign, aSig64, aSigExtra STATUS_VAR);
> +}
thanks
-- PMM
- [Qemu-ppc] [V4 PATCH 00/22] PowerPC VSX Stage 3, Tom Musta, 2013/12/18
- [Qemu-ppc] [V4 PATCH 01/22] softfloat: Fix float64_to_uint64, Tom Musta, 2013/12/18
- [Qemu-ppc] [V4 PATCH 02/22] softfloat: Add float32_to_uint64(), Tom Musta, 2013/12/18
- Re: [Qemu-ppc] [Qemu-devel] [V4 PATCH 02/22] softfloat: Add float32_to_uint64(),
Peter Maydell <=
- [Qemu-ppc] [V4 PATCH 03/22] softfloat: Fix float64_to_uint64_round_to_zero, Tom Musta, 2013/12/18
- [Qemu-ppc] [V4 PATCH 04/22] softfloat: Fix float64_to_uint32, Tom Musta, 2013/12/18
- [Qemu-ppc] [V4 PATCH 05/22] softfloat: Fix float64_to_uint32_round_to_zero, Tom Musta, 2013/12/18
- [Qemu-ppc] [V4 PATCH 06/22] target-ppc: Add set_fprf Argument to fload_invalid_op_excp(), Tom Musta, 2013/12/18
- [Qemu-ppc] [V4 PATCH 07/22] target-ppc: General Support for VSX Helpers, Tom Musta, 2013/12/18
- [Qemu-ppc] [V4 PATCH 08/22] target-ppc: Add VSX ISA2.06 xadd/xsub Instructions, Tom Musta, 2013/12/18