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[Qemu-ppc] [PULL 23/32] Add Power7 VSX Logical Instructions
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 23/32] Add Power7 VSX Logical Instructions |
Date: |
Fri, 20 Dec 2013 02:00:45 +0100 |
From: Tom Musta <address@hidden>
This patch adds the VSX logical instructions that are defined
by the Version 2.06 Power ISA (aka Power7):
- xxland
- xxlandc
- xxlor
- xxlxor
- xxlnor
Signed-off-by: Tom Musta <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index d1e30ff..710ae32 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7268,6 +7268,24 @@ VSX_VECTOR_MOVE(xvnegsp, OP_NEG, SGN_MASK_SP)
VSX_VECTOR_MOVE(xvcpsgnsp, OP_CPSGN, SGN_MASK_SP)
+#define VSX_LOGICAL(name, tcg_op) \
+static void glue(gen_, name)(DisasContext * ctx) \
+ { \
+ if (unlikely(!ctx->vsx_enabled)) { \
+ gen_exception(ctx, POWERPC_EXCP_VSXU); \
+ return; \
+ } \
+ tcg_op(cpu_vsrh(xT(ctx->opcode)), cpu_vsrh(xA(ctx->opcode)), \
+ cpu_vsrh(xB(ctx->opcode))); \
+ tcg_op(cpu_vsrl(xT(ctx->opcode)), cpu_vsrl(xA(ctx->opcode)), \
+ cpu_vsrl(xB(ctx->opcode))); \
+ }
+
+VSX_LOGICAL(xxland, tcg_gen_and_tl)
+VSX_LOGICAL(xxlandc, tcg_gen_andc_tl)
+VSX_LOGICAL(xxlor, tcg_gen_or_tl)
+VSX_LOGICAL(xxlxor, tcg_gen_xor_tl)
+VSX_LOGICAL(xxlnor, tcg_gen_nor_tl)
/*** SPE extension ***/
/* Register moves */
@@ -9770,6 +9788,17 @@ GEN_XX2FORM(xvabssp, 0x12, 0x19, PPC2_VSX),
GEN_XX2FORM(xvnabssp, 0x12, 0x1A, PPC2_VSX),
GEN_XX2FORM(xvnegsp, 0x12, 0x1B, PPC2_VSX),
GEN_XX3FORM(xvcpsgnsp, 0x00, 0x1A, PPC2_VSX),
+
+#undef VSX_LOGICAL
+#define VSX_LOGICAL(name, opc2, opc3, fl2) \
+GEN_XX3FORM(name, opc2, opc3, fl2)
+
+VSX_LOGICAL(xxland, 0x8, 0x10, PPC2_VSX),
+VSX_LOGICAL(xxlandc, 0x8, 0x11, PPC2_VSX),
+VSX_LOGICAL(xxlor, 0x8, 0x12, PPC2_VSX),
+VSX_LOGICAL(xxlxor, 0x8, 0x13, PPC2_VSX),
+VSX_LOGICAL(xxlnor, 0x8, 0x14, PPC2_VSX),
+
GEN_XX3FORM_DM(xxpermdi, 0x08, 0x01),
#undef GEN_SPE
--
1.8.1.4
- [Qemu-ppc] [PULL 03/32] Declare and Enable VSX, (continued)
- [Qemu-ppc] [PULL 03/32] Declare and Enable VSX, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 11/32] Add lxvdsx, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 01/32] target-ppc: add stubs for KVM breakpoints, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 14/32] Add stxvw4x, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 24/32] Add xxmrgh/xxmrgl, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 10/32] Add lxsdx, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 09/32] Add xxpermdi, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 13/32] Add stxsdx, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 12/32] Add lxvw4x, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 15/32] target-ppc: move POWER7+ to a separate family, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 23/32] Add Power7 VSX Logical Instructions,
Alexander Graf <=
- [Qemu-ppc] [PULL 31/32] spapr: make sure RMA is in first mode of first memory node, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 17/32] spapr-rtas: add ibm, (get|set)-system-parameter, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 19/32] spapr: tie spapr-nvram to -pflash, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 18/32] PPC: Use default pci bus name for grackle and heathrow, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 26/32] Add xxspltw, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 28/32] PPC: Add VSX to hflags, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 16/32] spapr-rtas: replace return code constants with macros, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 32/32] spapr: limit numa memory regions by ram size, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 29/32] device_tree: s/qemu_devtree/qemu_fdt globally, Alexander Graf, 2013/12/19
- [Qemu-ppc] [PULL 25/32] Add xxsel, Alexander Graf, 2013/12/19