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Re: [Qemu-ppc] [PATCH V2 05/10] target/ppc: Add ibm, processor-radix-AP-
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH V2 05/10] target/ppc: Add ibm, processor-radix-AP-encodings for TCG |
Date: |
Fri, 3 Mar 2017 14:29:09 +1100 |
User-agent: |
Mutt/1.7.1 (2016-10-04) |
On Wed, Mar 01, 2017 at 06:12:56PM +1100, Suraj Jitindar Singh wrote:
> The ibm,processor-radix-AP-encodings device tree property of the cpu node
> is used to specify the radix mode supported page sizes of the processor
> to the guest os. Contained in the top 3 bits of the msb is the actual
> page size (AP) encoding associated with the corresponding radix mode
> supported page size. Add this property for a TCG guest, note the TCG code
> is capable of translating any format so just add the 4 default page sizes.
>
> The ibm,processor-radix-AP-encodings device tree property is defined as:
> One to n cells in ascending order of radix mode supported page sizes
> encoded as BE ints (32bit on ppc) in the form:
> 0bxxxyyyyyyyyyyyyyyyyyyyyyyyyyyyyy
> - 0bxxx -> AP encoding
> - 0byyyyyyyyyyyyyyyyyyyyyyyyyyyyy -> supported page size encoded as a shift
>
> Signed-off-by: Suraj Jitindar Singh <address@hidden>
>
> ---
>
> V1 -> V2:
> - Rework to use the interfaces introduced by the KVM code path
> ---
> target/ppc/Makefile.objs | 1 +
> target/ppc/kvm.c | 2 --
> target/ppc/mmu-radix64.c | 51
> +++++++++++++++++++++++++++++++++++++++++++++
> target/ppc/mmu-radix64.h | 14 +++++++++++++
> target/ppc/translate_init.c | 2 ++
> 5 files changed, 68 insertions(+), 2 deletions(-)
> create mode 100644 target/ppc/mmu-radix64.c
> create mode 100644 target/ppc/mmu-radix64.h
>
> diff --git a/target/ppc/Makefile.objs b/target/ppc/Makefile.objs
> index ed2174c..5bc39c4 100644
> --- a/target/ppc/Makefile.objs
> +++ b/target/ppc/Makefile.objs
> @@ -4,6 +4,7 @@ obj-y += translate.o
> ifeq ($(CONFIG_SOFTMMU),y)
> obj-y += machine.o mmu_helper.o mmu-hash32.o monitor.o
> obj-$(TARGET_PPC64) += mmu-hash64.o mmu-book3s-v3.o arch_dump.o compat.o
> +obj-$(TARGET_PPC64) += mmu-radix64.o
> endif
> obj-$(CONFIG_KVM) += kvm.o
> obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> index 75cb8e6..b11abfd 100644
> --- a/target/ppc/kvm.c
> +++ b/target/ppc/kvm.c
> @@ -2425,8 +2425,6 @@ static void kvmppc_host_cpu_class_init(ObjectClass *oc,
> void *data)
> pcc->l1_icache_size = icache_size;
> }
>
> - pcc->radix_page_info = kvm_enabled() ? kvm_get_radix_page_info() : NULL;
> -
> /* Reason: kvmppc_host_cpu_initfn() dies when !kvm_enabled() */
> dc->cannot_destroy_with_object_finalize_yet = true;
> }
> diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
> new file mode 100644
> index 0000000..92025cf
> --- /dev/null
> +++ b/target/ppc/mmu-radix64.c
> @@ -0,0 +1,51 @@
> +/*
> + * PowerPC Radix MMU mulation helpers for QEMU.
> + *
> + * Copyright (c) 2016 Suraj Jitindar Singh, IBM Corporation
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see
> <http://www.gnu.org/licenses/>.
> + */
> +#include "qemu/osdep.h"
> +#include "qapi/error.h"
> +#include "cpu.h"
> +#include "exec/exec-all.h"
> +#include "exec/helper-proto.h"
> +#include "qemu/error-report.h"
> +#include "sysemu/kvm.h"
> +#include "kvm_ppc.h"
> +#include "exec/log.h"
> +#include "mmu-radix64.h"
> +#include "mmu-book3s-v3.h"
> +
> +/*
> + * Radix pg sizes and AP encodings for dt node
> ibm,processor-radix-AP-encodings
> + * Encoded as array of int_32s in the form:
> + * 0bxxxyyyyyyyyyyyyyyyyyyyyyyyyyyyyy
> + * x -> AP encoding
> + * y -> radix mode supported page size (encoded as a shift)
> + */
> +static struct ppc_radix_page_info radix_page_info = {
> + .count = 4,
> + .entries = {
> + 0x0000000c, /* 4K - enc: 0x0 */
> + 0xa0000010, /* 64K - enc: 0x5 */
> + 0x20000015, /* 2M - enc: 0x1 */
> + 0x4000001e /* 1G - enc: 0x2 */
> + }
> +};
> +
> +struct ppc_radix_page_info *ppc_radix64_get_page_info(void)
> +{
> + return kvm_enabled() ? kvm_get_radix_page_info() : &radix_page_info;
I don't think this is right. You want to use the KVM probed
information only for -cpu host. For other cases you should use the
canned info - if what the user has selected doesn't match the host,
that's a user error - they should have used -cpu host.
> +}
> diff --git a/target/ppc/mmu-radix64.h b/target/ppc/mmu-radix64.h
> new file mode 100644
> index 0000000..9bd283c
> --- /dev/null
> +++ b/target/ppc/mmu-radix64.h
> @@ -0,0 +1,14 @@
> +#ifndef MMU_RADIX64_H
> +#define MMU_RADIX64_H
> +
> +#ifndef CONFIG_USER_ONLY
> +
> +#ifdef TARGET_PPC64
> +
> +struct ppc_radix_page_info *ppc_radix64_get_page_info(void);
> +
> +#endif /* TARGET_PPC64 */
> +
> +#endif /* CONFIG_USER_ONLY */
> +
> +#endif /* MMU_RADIX64_H */
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index d8f5b61..b2dc452 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -33,6 +33,7 @@
> #include "hw/qdev-properties.h"
> #include "hw/ppc/ppc.h"
> #include "mmu-book3s-v3.h"
> +#include "mmu-radix64.h"
>
> //#define PPC_DUMP_CPU
> //#define PPC_DEBUG_SPR
> @@ -8959,6 +8960,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
> pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault;
> /* segment page size remain the same */
> pcc->sps = &POWER7_POWER8_sps;
> + pcc->radix_page_info = ppc_radix64_get_page_info();
I also think this won't quite work - at this early type init stage, I
don't think kvm is sufficiently initialized to query like this.
That's one reason to delay the KVM initialization until host cpu setup.
> #endif
> pcc->excp_model = POWERPC_EXCP_POWER8;
> pcc->bus_model = PPC_FLAGS_INPUT_POWER7;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries TCG RADIX Support, Suraj Jitindar Singh, 2017/03/01
- [Qemu-ppc] [PATCH V2 01/10] target/ppc: Add Instruction Authority Mask Register Check, Suraj Jitindar Singh, 2017/03/01
- [Qemu-ppc] [PATCH V2 02/10] target/ppc: Add execute permission checking to access authority check, Suraj Jitindar Singh, 2017/03/01
- [Qemu-ppc] [PATCH V2 03/10] target/ppc: Move no-execute and guarded page checking into new function, Suraj Jitindar Singh, 2017/03/01
- [Qemu-ppc] [PATCH V2 04/10] target/ppc: Rework hash mmu page fault code and add defines for clarity, Suraj Jitindar Singh, 2017/03/01
- [Qemu-ppc] [PATCH V2 05/10] target/ppc: Add ibm, processor-radix-AP-encodings for TCG, Suraj Jitindar Singh, 2017/03/01
- [Qemu-ppc] [PATCH V2 06/10] target/ppc: Add POWER9/ISAv3.00 to compat_table, Suraj Jitindar Singh, 2017/03/01
- [Qemu-ppc] [PATCH V2 07/10] target/ppc: Flush TLB on write to PIDR, Suraj Jitindar Singh, 2017/03/01
- [Qemu-ppc] [PATCH V2 08/10] target/ppc: Adapt tlbie[l] for ISAv3.00 Support, Suraj Jitindar Singh, 2017/03/01
- [Qemu-ppc] [PATCH V2 09/10] target/ppc: Implement ISA V3.00 radix page fault handler, Suraj Jitindar Singh, 2017/03/01
- [Qemu-ppc] [PATCH V2 10/10] target/ppc: Enable RADIX for pseries TCG guest, Suraj Jitindar Singh, 2017/03/01