[Simulavr-devel] Patch: simulavrxx <->Verilog binding

[Onno Kortmann]

Hi,

I created a small piece of code which allows to use instances of the 
simulavrxx simulator in a verilog hardware simulation setup. IMHO, this 
increases the utility of simulavrxx alot :-P 

It works by creating a verilog VPI interface, which can be used at least from 
the free software Icarus Verilog simulator. One can load a program as an ELF 
file into the AVR as usual and then use verilog to drive the AVR's clocks and 
inputs and connect other hardware to the AVR outputs.

The code is appended in one single patch which should apply cleanly to CVS 
HEAD. If requested, I can split the patch into different portions, as I have 
done some additions/cleanup to the main simulavr code.
It adds some hacks to the build system which maybe one with more knowledge 
about autotools could do better. It has so far only been tested on a amd64 
linux system. The Makefile will produce a file named 
avr.vpi which can be loaded in Icarus Verilog - if Icarus Verilog and its 
development files are installed.

Iincluded are some trivial examples and additional verilog-side glue code  
which I put into the src/verilog/ directory. The contents of this directory is 
appended in the file verilog.tar.gz and can be considered an addition to the 
patch. 

The glue code is still incomplete. The examples produce .vcd waveform files 
(they are included but should be removed with make clean before any commit) 
which can be viewed e.g. with gtkwave.

I like to hear of any comments regarding this interface, especially its 
usability/cleanliness, as I am a beginner in the verilog area.  I hope 
the patch did not break any old simulavrxx code.

BTW, I have another couple of questions regarding the simulavr code/wishlist:

- Why are no exceptions used?
- Why are (const) char* used all over the place when there is std::string?
- Wouldn't it be a good idea to separate the device configurations (at4433.*, 
at8515.*, ...) into a separate configuration setting, maybe even one which is 
automatically generated from the offical ATMEL docs with a little script? 
The ATMEL docs seem to be always in the same overall format, as far as I can 
see.

Greetings,

Onno

verilog.tar.gz
Description: application/tgz

simulavrxx-vpi.patch
Description: Text Data