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Re: [avr-gcc-list] FPLIB BUG: MEGA128

From: Peter Jansen
Subject: Re: [avr-gcc-list] FPLIB BUG: MEGA128
Date: Thu, 21 Mar 2002 09:59:59 +1100

Hi Peter,

> Like I said, LPM_R0_ZPLUS_INIT uses a register.

Well not exactally, the only instruction in this macro is 

        out     (RAMPZ-__SFR_OFFSET), \hhi

So their are no registers used.

The LPM_R0_ZPLUS_NEXT uses r0 which yes you would have to write another
one of them. I don't like the name of the macro either.

> If going for option 1. the best way would be to write another macro
> which somehow works out at what address the relevant table sits and
> loads RAMPZ accordingly, after that one can use LPM_R0_ZPLUS_NEXT to
> load the data.
> Question is: how do you work out where the table gets linked in ? As
> far as I understand, all I can get is a 16 bit address (not 17 bit).

Ok, the operator lo8(x) gives you the lower 8 bits of x,
                 hi8(x) gives you the bits 15-8 of x,
                 hh8(x) gives you bits 23-16 of x


        ldi r0, hh8(x) loads r0 with bits 23-17 of x.

The lo8 and hi8 are defined as LOW and HIGH macros in

It took me some time to figure out how this was done but the assembler
takes them and tells the linker to put the correct address in at
relocation time.

> BIG_CODE looks a bit suspicious to me (mine reads 0x10000) shouldn't it
> read 0xffff ?

Yep I would agree it should be 0xffff feed a change to the maintainer of


Peter Jansen
KlaxonIQA (formally Smart Container)
Level 1, IBC Building
Garden St
NSW       1430
Ph 02 9209 4017
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