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[avr-gcc-list] Mega48 EEPROM problem?

From: Bob Paddock
Subject: [avr-gcc-list] Mega48 EEPROM problem?
Date: Wed, 30 Mar 2005 13:55:44 -0500
User-agent: Opera M2/7.54u1 (Win32, build 3918)

I am trying to use the EEPROM of the Mega48 with latest WinAVR (3.4.3).
A full test case is at the end of this message.

What I do not understand is how this:

    /* Set up address and Data Registers */
    EEAR = 0x0010;

translates into this:

  42 0012 80E1                  ldi r24,lo8(16)
  43 0014 8EBB                  out 62-0x20,r24

According to my math 62-0x20 equals 0x1E, which is wrong for the Mega48.

It seems that these defines are not being used, and I'm not sure
what defines are being used?:

iomx8.h has the following which do match the datasheet:

#define EEDR    _SFR_IO8 (0x20)
#define EEAR    _SFR_IO16 (0x21)
#define EEARL   _SFR_IO8 (0x21)
#define EEARH   _SFR_IO8 (0x22)
Even though EEARH is not used by the mega48, the EEAR8 bit in the register
must be written to 0, according to the datasheet, hence the EEARH register
must be defined for the mega48.

Also why is only eight bits being written to EEAR when it should be sixteen bits?

Test case:

Makefile created with MFile has:

# MCU name
MCU = atmega48

--Cut Here--

#define _CLI() do { __asm__ __volatile__ ("cli"); } while (0)

#include <avr/io.h>

#ifndef _AVR_IOM48_H_
#error Not Mega48

#ifndef EEARL
#error No EEARL

#if 0 // This test fails.  Why?
#ifndef EEARH
#error No EEARH

int main()
    unsigned char sreg_save;

    sreg_save = SREG; /* Save SREG value (I-bit) */
    /* Disable interrupts during timed sequence */

    /* Wait for completion of previous write */
    while( EECR & 1<<EEPE )

    EECR = 0; /* Set the mode bits to Erase then Write */

    /* Set up address and Data Registers */
    EEAR = 0x0010; // The code generated here seems wrong?

// EEARH = 0; // There is no EEARH defined even tho it is in iomx8.h?

    EEDR = 'U';

    /* Write logical one to EEMPE */
    EECR |= 1<<EEMPE;

    /* Start eeprom write by setting EEPE */
    EECR |= 1<<EEPE;

    /* Wait for completion of previous write */
    while( EECR & 1<<EEPE )

    SREG = sreg_save; /* Restore SREG value (I-bit) */

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