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From: | David Bourgeois |
Subject: | Re: [avr-gcc-list] interrupt optimization |
Date: | Thu, 02 Feb 2006 00:39:29 +0100 |
User-agent: | Opera M2/8.51 (Win32, build 7712) |
Thanks for your answer David.Unfortunately going entirely in asm for the interrupt is not the option I would like to have here.
First, can you not enable this int unless it's needed?
This was a caricatural example. Actually my prog outputs 8 bits pwm so I only have the prescaler to set the frequency. I need to further correct it by software in the interrupt.
Second, it dosen't matter what the compiler is doing, an ASM coded int needsto save SREG, and any regs you modify during the int, and that's all.
I can code parts of the ISR in assembly but I would like to keep at least the inline function call in C because it's quite complex and will probably need further modifications. So in this case I need to save all registers my C function uses before the function call. I can check them in the lss file and manually include psuh/pop in inline asm but then I'm afraid the function will use other registers if I modify it later on. I can still be carefull and modify the inline asm accordingly but I'm just asking here if there's a better way of doing this.
I've even done ints that didn't bother saving the sreg, but those were special cases where I knew absolutely that I wasn't doing anything that would change the contents of SREG. So: Push R16 ;saving whatever the compiler thought was going on. in R16,SREG push R16 ;saving sreg int code, using R16 pop R16 out SREG,R16 pop R16 reti When I code in assembler, I reserve a register to hold SREG, and two more(typically) for interrupt use, as ITEMP and ITEMP2. This allows me to do alot of things without pushes and pops.In one app, on an 8515 at 8 mhz, I had to deal with 300,000 ints/sec from abursty source. No problem with this approach.
-- David Bourgeois C2ME - Centre de Conception en Microtechnologies Européen sa Parc Initialis - Rue René Descartes, 2 - 7000 Mons (Belgium) Phone : +32 65 37 42 25 - Fax +32 65 37 42 36
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