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Re: [avr-gcc-list] Toolchain developers: State of GCC HEAD

From: hutchinsonandy
Subject: Re: [avr-gcc-list] Toolchain developers: State of GCC HEAD
Date: Tue, 26 Aug 2008 16:12:14 -0400

IRA will likely cause a lot of spill failures. It has more agressive allocation, so the chance of it running out of base registers is higher.

The AVR port is fundementally flawed in its handling of reloads around base pointer and frame register.
(existing bug reports show some examples)

You should be able to see these easily in test log file (with IRA enabled).
Then you could force it to not remove frame pointer and number of failures will decrease as this remove one main cause.

There may be some other reasons mixed in.

With IRA disabled (which I thought was default)  it should be no different of course!


Sent from my Dingleberry wired device.

-----Original Message-----
From: Weddington, Eric <address@hidden>
To: address@hidden
Sent: Tue, 26 Aug 2008 2:48 pm
Subject: [avr-gcc-list] Toolchain developers: State of GCC HEAD

Hi All,

GCC HEAD/4.4 has been in stage 1 for a while now. Recently, they announced that 
they will be entering stage 2 after August 31. Stage 2 only allows bug fixes, no 
new features. So many GCC developers are now in the final stages of adding 
various new features to GCC.

In the last 24 hours, a new Integrated Register Allocator (IRA) has been merged 
to the GCC trunk. Andy Hutchinson got the new IRA working for the AVR port.

Before the IRA merge, I was seeing 75 test failures from the GCC Regression Test 
Suite. Several days ago, I was seeing around 57 test failures. After the IRA 
merge, I am now seeing 233 test failures. After this email I will be going 
through those failures and making sure that they get reported in the GCC Bug 

Any help would be greatly appreciated in getting these bugs resolved for the AVR 
port. If these bugs do not get resolved in a timely manner, we may very well 
have a situation where GCC 4.4.0 is *worse* for the AVR port, than it is for 
version 4.3.x. This would certainly put a damper on future releases of toolchain 
distributions, with new device support, and new features.

Note that stage 1 is not over yet. There are other major features that are also 
being added in before the close of stage 1. The test failure count may still go 
higher over the next few days.

Eric Weddington

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