[bug #51292] Handling make rules where prerequisites are determined by functions for specific targets lists

[Paul D. Smith]

Follow-up Comment #5, bug #51292 (project make):

Bleah, typo.  Rewriting:

You can easily add the suffix as part of the static pattern rule:


targets ::= foo bar

$(targets:=.o): %.o: %.c
        $(CC) -c $(CFLAGS) $< -o $@


If you want a "callback"-like setup you can already do it with eval and call:


# Function to generate a new rule.
# Call syntax: $(call new_rule,<target>,<callback_fn_name>)
define new_rule
$1 : $$(call $2,$1)
        $$(CC) -c $$(CFLAGS) $$< -o $$@
endef

# Example use
targets = foo bar biz

foo_prereq = foo1 foo2 foo3
bar_prereq = $(addsuffix .xx,$1)
biz_prereq = $(addprefix $1,.a .b .c)

$(foreach T,$(targets),$(eval $(call new_rule,$T,$T_prereq)))


You can of course also add other callbacks, for the target, recipe, etc.

Personally I'm not convinced this is useful in general... it's certainly a lot
less readable (to me).  But if you had one set of global makefiles that
defined all the templates, etc. then used data-driven variable assignments to
do the rest I suppose it might be useful.

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