[bug #51292] Handling make rules where prerequisites are determined by functions for specific targets lists

[Markus Elfring]

Follow-up Comment #7, bug #51292 (project make):

> If you want a "callback"-like setup you can already do it with eval and
call:

This approach might be an approximation which can work as usual for a while.


> Personally I'm not convinced this is useful in general...

I dared to propose a software extension which can be similar to the
functionality “static pattern rules”.
Under which circumstances can the generic variant move into the standard
functions?


> But if you had one set of global makefiles that defined all the templates,
etc. then used data-driven variable assignments to do the rest I suppose it
might be useful.

Thanks that you can follow in this software design direction.

I imagine that make rule construction can become more dynamic.

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