Re: [Discuss-gnuradio] Block diagram of FPGA interface

[Damien B.]

Hi Matt,
I came up with the same diagram with a few difference. Could you confirm them ?

- the cordic stage in TX chain is disable (V0.8)

- DA converter can work at 128MS/s but the txsync is muxing at 32MS/s
for each channel

Thanks, cheers
Damien

On 4/19/05, Matt Ettus <address@hidden> wrote:
> Quoting Achilleas Anastasopoulos <address@hidden>:
> 
> > Dear all,
> 
> >
> 
> > I am trying to understand exactly what kind of SP
> 
> > is going on the Rx and Tx path of the FPGA and basic
> 
> > Rx/Tx.
> 
> >
> 
> > I am attaching an eps file (and an xfig file) with a hypothesized block
> 
> > diagram that is the result of all the information I have
> 
> > collected on the website and the discussions.
> 
> >
> 
> > Can you comment on that and tell me if this is
> 
> > exactly what is going on?
> 
> You have the receive path exactly correct.  The DACs in the TX path are 128
> 
> MS/s, and some of the processing you show happens in a slightly different way,
> 
> but the end result is the same.
> 
> Matt
> 
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